Re: [Libunwind-devel] Fix word size for MIPS architecture

[Vicente Olivert Riera]

On 12/02/2014 10:55 AM, Arun Sharma wrote:
> On Tue, Dec 2, 2014 at 3:56 PM, Vicente Olivert Riera
> <address@hidden> wrote:
> 
>> Uhm..., I don't think so. Take a look to this:
>>
>> http://www.imgtec.com/mips/architectures/mips64.asp
>>
>> The last part:
>>
>> "[...] the architecture features a 32-bit compatibility mode, in which
>> all registers and addresses are 32-bit wide [...]"
> 
> Ok - this is more like x86_32 binaries running on x86_64 kernel. Not
> sure why you'd call this a MIPS64 ABI then.
> 
> Either way, I'm happy to apply the patch if you're able to
> configure/run "make check" on n32 with the patch and get results
> comparable to n64, although I really prefer that we break MIPS support
> into two different archs.

On n32 I see some warnings I don't see on n64:

In file included from ../include/tdep/libunwind_i.h:13:0,
                 from ../include/libunwind_i.h:321,
                 from os-linux.c:29:
../include/tdep-mips/libunwind_i.h: In function 'read_s32':
../include/tdep-mips/libunwind_i.h:162:5: warning: right shift count >=
width of type [enabled by default]
     *val = (int32_t) (memval >> 32);
     ^
../include/tdep-mips/libunwind_i.h: In function 'write_s32':
../include/tdep-mips/libunwind_i.h:181:5: warning: left shift count >=
width of type [enabled by default]
     memval = (memval & 0xffffffffLL) | (uint32_t) (*val << 32);
     ^

The rest of the build log looks the same.

Cheers,
-- 
Vicente Olivert Riera
Graduate Software Engineer, MIPS Platforms
Imagination Technologies Limited
t: +44 (0)113 2429814
www.imgtec.com