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Re: [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb
From: |
Alex Bennée |
Subject: |
Re: [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state |
Date: |
Mon, 14 Oct 2019 17:17:23 +0100 |
User-agent: |
mu4e 1.3.5; emacs 27.0.50 |
Richard Henderson <address@hidden> writes:
> Hoist the computation of some TBFLAG_A32 bits that only apply to
> M-profile under a single test for ARM_FEATURE_M.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> target/arm/helper.c | 49 +++++++++++++++++++++------------------------
> 1 file changed, 23 insertions(+), 26 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index d4303420da..296a4b2232 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11194,6 +11194,29 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
>
> if (arm_feature(env, ARM_FEATURE_M)) {
> flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
> +
> + if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
> + FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S)
> + != env->v7m.secure) {
> + flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
> + }
> +
> + if ((env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) &&
> + (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) ||
> + (env->v7m.secure &&
> + !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) {
> + /*
> + * ASPEN is set, but FPCA/SFPA indicate that there is no
> + * active FP context; we must create a new FP context before
> + * executing any FP insn.
> + */
> + flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1);
> + }
> +
> + bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK;
> + if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) {
> + flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1);
> + }
> } else {
> flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
> }
> @@ -11233,32 +11256,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> }
> }
>
> - if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
> - FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) !=
> env->v7m.secure) {
> - flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
> - }
> -
> - if (arm_feature(env, ARM_FEATURE_M) &&
> - (env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) &&
> - (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) ||
> - (env->v7m.secure &&
> - !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) {
> - /*
> - * ASPEN is set, but FPCA/SFPA indicate that there is no active
> - * FP context; we must create a new FP context before executing
> - * any FP insn.
> - */
> - flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1);
> - }
> -
> - if (arm_feature(env, ARM_FEATURE_M)) {
> - bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK;
> -
> - if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) {
> - flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1);
> - }
> - }
> -
> if (!arm_feature(env, ARM_FEATURE_M)) {
> int target_el = arm_debug_target_el(env);
--
Alex Bennée
- [PATCH v6 01/20] target/arm: Split out rebuild_hflags_common, (continued)
- [PATCH v6 01/20] target/arm: Split out rebuild_hflags_common, Richard Henderson, 2019/10/11
- [PATCH v6 03/20] target/arm: Split out rebuild_hflags_common_32, Richard Henderson, 2019/10/11
- [PATCH v6 04/20] target/arm: Split arm_cpu_data_is_big_endian, Richard Henderson, 2019/10/11
- [PATCH v6 02/20] target/arm: Split out rebuild_hflags_a64, Richard Henderson, 2019/10/11
- [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32, Richard Henderson, 2019/10/11
- [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- Re: [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state,
Alex Bennée <=
- [PATCH v6 07/20] target/arm: Split out rebuild_hflags_a32, Richard Henderson, 2019/10/11
- [PATCH v6 08/20] target/arm: Split out rebuild_hflags_aprofile, Richard Henderson, 2019/10/11
- [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Richard Henderson, 2019/10/11
- [PATCH v6 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Richard Henderson, 2019/10/11