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Re: [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s
From: |
Tom Musta |
Subject: |
Re: [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8 |
Date: |
Tue, 03 Jun 2014 11:54:33 -0500 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote:
> This replaces VRSAVE registration and vscr_init() call with
> gen_spr_book3s_altivec() which is generic and does the same thing if
> insns_flags has PPC_ALTIVEC bit set (which POWER7/8 have set).
>
> Signed-off-by: Alexey Kardashevskiy <address@hidden>
> ---
>
> Here is the function for the reference:
>
> static void gen_spr_book3s_altivec(CPUPPCState *env)
> {
> if (!(env->insns_flags & PPC_ALTIVEC)) {
> return;
> }
>
> spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
> &spr_read_generic, &spr_write_generic,
> &spr_read_generic, &spr_write_generic,
> 0x00000000);
>
> /* Can't find information on what this should be on reset. This
> * value is the one used by 74xx processors. */
> vscr_init(env, 0x00010000);
> }
> ---
> target-ppc/translate_init.c | 8 +-------
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 576056c..40c8ce1 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -7778,6 +7778,7 @@ static void init_proc_POWER7 (CPUPPCState *env)
> {
> gen_spr_ne_601(env);
> gen_spr_7xx(env);
> + gen_spr_book3s_altivec(env);
> /* Time base */
> gen_tbl(env);
> #if !defined(CONFIG_USER_ONLY)
> @@ -7801,10 +7802,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
> gen_spr_power6_common(env);
> gen_spr_power6_dbg(env);
> gen_spr_amr(env);
> - spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
> - &spr_read_generic, &spr_write_generic,
> - &spr_read_generic, &spr_write_generic,
> - 0x00000000);
> /* Logical partitionning */
> spr_register_kvm(env, SPR_LPCR, "LPCR",
> SPR_NOACCESS, SPR_NOACCESS,
> @@ -7819,9 +7816,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
>
> /* Allocate hardware IRQ controller */
> ppcPOWER7_irq_init(env);
> - /* Can't find information on what this should be on reset. This
> - * value is the one used by 74xx processors. */
> - vscr_init(env, 0x00010000);
> }
>
> POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
>
Reviewed-by: Tom Musta <address@hidden>
- [Qemu-devel] [PATCH v4 07/29] target-ppc: Add PMC7/8 to 970 class, (continued)
- [Qemu-devel] [PATCH v4 07/29] target-ppc: Add PMC7/8 to 970 class, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 05/29] target-ppc: Add "POWER" prefix to MMCRA PMU registers, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 06/29] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8, Alexey Kardashevskiy, 2014/06/03
- Re: [Qemu-devel] [PATCH v4 15/29] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8,
Tom Musta <=
- [Qemu-devel] [PATCH v4 02/29] target-ppc: Merge 970FX and 970MP into a single 970 class, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 01/29] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 19/29] target-ppc: Add POWER7's TIR SPR, Alexey Kardashevskiy, 2014/06/03