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Re: [Qemu-devel] [PATCH v4 14/29] target-ppc: Move POWER7/8 CFAR/DSCR/CT
From: |
Alexey Kardashevskiy |
Subject: |
Re: [Qemu-devel] [PATCH v4 14/29] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers |
Date: |
Wed, 04 Jun 2014 12:02:16 +1000 |
User-agent: |
Mozilla/5.0 (X11; Linux i686 on x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 06/04/2014 02:54 AM, Tom Musta wrote:
> On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote:
>> This moves SCFAR/DSCR/CTRL/PPR/PCR PRs to helpers. Later these helpers
>> will be called from generalized init_proc_book3s_64().
>>
>> Signed-off-by: Alexey Kardashevskiy <address@hidden>
>> ---
>> target-ppc/translate_init.c | 70
>> ++++++++++++++++++++++++++-------------------
>> 1 file changed, 40 insertions(+), 30 deletions(-)
>>
>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>> index d6557f2..576056c 100644
>> --- a/target-ppc/translate_init.c
>> +++ b/target-ppc/translate_init.c
>> @@ -7523,6 +7523,42 @@ static void gen_spr_book3s_purr(CPUPPCState *env)
>> #endif
>> }
>>
>> +static void gen_spr_power6_dbg(CPUPPCState *env)
>> +{
>> +#if !defined(CONFIG_USER_ONLY)
>> + spr_register(env, SPR_CFAR, "SPR_CFAR",
>> + SPR_NOACCESS, SPR_NOACCESS,
>> + &spr_read_cfar, &spr_write_cfar,
>> + 0x00000000);
>> +#endif
>> +}
>> +
>> +static void gen_spr_power5p_common(CPUPPCState *env)
>> +{
>> + spr_register(env, SPR_PPR, "PPR",
>> + &spr_read_generic, &spr_write_generic,
>> + &spr_read_generic, &spr_write_generic,
>> + 0x00000000);
>> +}
>> +
>> +static void gen_spr_power6_common(CPUPPCState *env)
>> +{
>> +#if !defined(CONFIG_USER_ONLY)
>> + spr_register_kvm(env, SPR_DSCR, "SPR_DSCR",
>> + SPR_NOACCESS, SPR_NOACCESS,
>> + &spr_read_generic, &spr_write_generic,
>> + KVM_REG_PPC_DSCR, 0x00000000);
>> +#endif
>> + /*
>> + * Register PCR to report POWERPC_EXCP_PRIV_REG instead of
>> + * POWERPC_EXCP_INVAL_SPR.
>> + */
>> + spr_register(env, SPR_PCR, "PCR",
>> + SPR_NOACCESS, SPR_NOACCESS,
>> + SPR_NOACCESS, SPR_NOACCESS,
>> + 0x00000000);
>> +}
>> +
>> static void gen_spr_power8_tce_address_control(CPUPPCState *env)
>> {
>> spr_register(env, SPR_TAR, "TAR",
>> @@ -7745,14 +7781,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
>> /* Time base */
>> gen_tbl(env);
>> #if !defined(CONFIG_USER_ONLY)
>> - spr_register(env, SPR_CFAR, "SPR_CFAR",
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - &spr_read_cfar, &spr_write_cfar,
>> - 0x00000000);
>> - spr_register_kvm(env, SPR_DSCR, "SPR_DSCR",
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - &spr_read_generic, &spr_write_generic,
>> - KVM_REG_PPC_DSCR, 0x00000000);
>> spr_register_kvm(env, SPR_POWER_MMCRA, "SPR_MMCRA",
>> SPR_NOACCESS, SPR_NOACCESS,
>> &spr_read_generic, &spr_write_generic,
>> @@ -7768,24 +7796,15 @@ static void init_proc_POWER7 (CPUPPCState *env)
>> #endif /* !CONFIG_USER_ONLY */
>> gen_spr_book3s_ids(env);
>> gen_spr_book3s_purr(env);
>> + gen_spr_book3s_common(env);
>> + gen_spr_power5p_common(env);
>> + gen_spr_power6_common(env);
>> + gen_spr_power6_dbg(env);
>> gen_spr_amr(env);
>> - /* XXX : not implemented */
>> - spr_register(env, SPR_CTRL, "SPR_CTRLT",
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - SPR_NOACCESS, &spr_write_generic,
>> - 0x80800000);
>> - spr_register(env, SPR_UCTRL, "SPR_CTRLF",
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - &spr_read_generic, SPR_NOACCESS,
>> - 0x80800000);
>
>
> Note that by switching to using gen_spr_book3s_common, there is an implicit
> change in the register names
> ("SPR_CTRLT" --> "SPR_CTRL" and "SPR_CTLRF -> "SPR_UCTRL"). I am not
> completely sure of the impact of
> this (change in what is seen in the monitor?) ....
Well, "info registers"/ppc_cpu_dump_state() does not use these names, so I
am not sure if the change will be visible at all.
> But I like your new names better than the old ones :)
Good :)
>
>
>
>> - /*
>> - * Register PCR to report POWERPC_EXCP_PRIV_REG instead of
>> - * POWERPC_EXCP_INVAL_SPR.
>> - */
>> - spr_register(env, SPR_PCR, "PCR",
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - SPR_NOACCESS, SPR_NOACCESS,
>> - 0x00000000);
>> }
>>
>
> We probably have quite a few hypervisor SPRs that should also be handled this
> way ????
This is definitely not today.
> Reviewed-by: Tom Musta <address@hidden>
got it, thanks!
--
Alexey
- Re: [Qemu-devel] [Qemu-ppc] [PATCH v4 02/29] target-ppc: Merge 970FX and 970MP into a single 970 class, (continued)
- [Qemu-devel] [PATCH v4 01/29] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 19/29] target-ppc: Add POWER7's TIR SPR, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 14/29] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 16/29] target-ppc: Make use of gen_spr_book3s_lpar() for POWER7/8, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 17/29] target-ppc: Switch POWER7/8 classes to use correct PMU SPRs, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 18/29] target-ppc: Refactor class init for POWER7/8, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 20/29] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 13/29] target-ppc: Move POWER8 TCE Address control (TAR) to a helper, Alexey Kardashevskiy, 2014/06/03