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Re: [Qemu-devel] [PATCH v4 18/29] target-ppc: Refactor class init for PO
From: |
Alexey Kardashevskiy |
Subject: |
Re: [Qemu-devel] [PATCH v4 18/29] target-ppc: Refactor class init for POWER7/8 |
Date: |
Wed, 04 Jun 2014 12:09:23 +1000 |
User-agent: |
Mozilla/5.0 (X11; Linux i686 on x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 06/04/2014 02:57 AM, Tom Musta wrote:
> On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote:
>> This extends init_proc_book3s_64 to support POWER7 and POWER8.
>>
>> Signed-off-by: Alexey Kardashevskiy <address@hidden>
>> ---
>> Changes:
>> v4:
>> * added g_assert_not_reached() to default path to catch errors earlier
>> ---
>> target-ppc/translate_init.c | 100
>> +++++++++++++++++++++++++++-----------------
>> 1 file changed, 61 insertions(+), 39 deletions(-)
>>
>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>> index b1288f4..17163e7 100644
>> --- a/target-ppc/translate_init.c
>> +++ b/target-ppc/translate_init.c
>> @@ -7269,6 +7269,9 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
>> enum BOOK3S_CPU_TYPE {
>> BOOK3S_CPU_970,
>> BOOK3S_CPU_POWER5PLUS,
>> + BOOK3S_CPU_POWER6,
>> + BOOK3S_CPU_POWER7,
>> + BOOK3S_CPU_POWER8
>> };
>>
>> static int check_pow_970 (CPUPPCState *env)
>> @@ -7575,30 +7578,74 @@ static void init_proc_book3s_64(CPUPPCState *env,
>> int version)
>> gen_spr_book3s_pmu_hypv(env);
>> gen_spr_book3s_pmu_user(env);
>> gen_spr_book3s_dbg(env);
>> -
>> - gen_spr_970_hid(env);
>> - gen_spr_970_hior(env);
>> - gen_low_BATs(env);
>> gen_spr_book3s_common(env);
>> - gen_spr_970_pmu_hypv(env);
>> - gen_spr_970_pmu_user(env);
>>
>> + switch (version) {
>> + case BOOK3S_CPU_970:
>> + case BOOK3S_CPU_POWER5PLUS:
>> + gen_spr_970_hid(env);
>> + gen_spr_970_hior(env);
>> + gen_low_BATs(env);
>> + gen_spr_970_pmu_hypv(env);
>> + gen_spr_970_pmu_user(env);
>> + break;
>
>
> It appears the 970/P5+ models now have both the old and the new PMU SPR
> numbers .... intentional?
How so?
gen_spr_book3s_pmu_xxx add PCM1..6, gen_spr_970_pmu_xxx add PMC7-8.
Since patch #4, 970/p5+ do not use old PMU SPRs.
--
Alexey
- Re: [Qemu-devel] [PATCH v4 19/29] target-ppc: Add POWER7's TIR SPR, (continued)
- [Qemu-devel] [PATCH v4 20/29] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 13/29] target-ppc: Move POWER8 TCE Address control (TAR) to a helper, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 24/29] KVM: target-ppc: Enable TM state migration, Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 09/29] target-ppc: Introduce and reuse generalized init_proc_book3s_64(), Alexey Kardashevskiy, 2014/06/03
- [Qemu-devel] [PATCH v4 21/29] target-ppc: Enable FSCR facility check for TAR, Alexey Kardashevskiy, 2014/06/03