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[Qemu-devel] [PATCH v5 15/30] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/P
From: |
Alexey Kardashevskiy |
Subject: |
[Qemu-devel] [PATCH v5 15/30] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers |
Date: |
Wed, 4 Jun 2014 22:50:50 +1000 |
This moves SCFAR/DSCR/CTRL/PPR/PCR PRs to helpers. Later these helpers
will be called from generalized init_proc_book3s_64().
This switches init_proc_POWER7() to use generalized gen_spr_book3s_common()
which registers CRTL SPR under slightly different names. No change in
behaviour or non-debug output is expected.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
---
target-ppc/translate_init.c | 70 ++++++++++++++++++++++++++-------------------
1 file changed, 40 insertions(+), 30 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6e36d2d..ac8c8c1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7530,6 +7530,42 @@ static void gen_spr_book3s_purr(CPUPPCState *env)
#endif
}
+static void gen_spr_power6_dbg(CPUPPCState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+ spr_register(env, SPR_CFAR, "SPR_CFAR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_cfar, &spr_write_cfar,
+ 0x00000000);
+#endif
+}
+
+static void gen_spr_power5p_common(CPUPPCState *env)
+{
+ spr_register(env, SPR_PPR, "PPR",
+ &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_generic,
+ 0x00000000);
+}
+
+static void gen_spr_power6_common(CPUPPCState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+ spr_register_kvm(env, SPR_DSCR, "SPR_DSCR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_DSCR, 0x00000000);
+#endif
+ /*
+ * Register PCR to report POWERPC_EXCP_PRIV_REG instead of
+ * POWERPC_EXCP_INVAL_SPR.
+ */
+ spr_register(env, SPR_PCR, "PCR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ 0x00000000);
+}
+
static void gen_spr_power8_tce_address_control(CPUPPCState *env)
{
spr_register(env, SPR_TAR, "TAR",
@@ -7752,14 +7788,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
/* Time base */
gen_tbl(env);
#if !defined(CONFIG_USER_ONLY)
- spr_register(env, SPR_CFAR, "SPR_CFAR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_cfar, &spr_write_cfar,
- 0x00000000);
- spr_register_kvm(env, SPR_DSCR, "SPR_DSCR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- KVM_REG_PPC_DSCR, 0x00000000);
spr_register_kvm(env, SPR_POWER_MMCRA, "SPR_MMCRA",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
@@ -7775,24 +7803,15 @@ static void init_proc_POWER7 (CPUPPCState *env)
#endif /* !CONFIG_USER_ONLY */
gen_spr_book3s_ids(env);
gen_spr_book3s_purr(env);
+ gen_spr_book3s_common(env);
+ gen_spr_power5p_common(env);
+ gen_spr_power6_common(env);
+ gen_spr_power6_dbg(env);
gen_spr_amr(env);
- /* XXX : not implemented */
- spr_register(env, SPR_CTRL, "SPR_CTRLT",
- SPR_NOACCESS, SPR_NOACCESS,
- SPR_NOACCESS, &spr_write_generic,
- 0x80800000);
- spr_register(env, SPR_UCTRL, "SPR_CTRLF",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, SPR_NOACCESS,
- 0x80800000);
spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
- spr_register(env, SPR_PPR, "PPR",
- &spr_read_generic, &spr_write_generic,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
/* Logical partitionning */
spr_register_kvm(env, SPR_LPCR, "LPCR",
SPR_NOACCESS, SPR_NOACCESS,
@@ -7810,15 +7829,6 @@ static void init_proc_POWER7 (CPUPPCState *env)
/* Can't find information on what this should be on reset. This
* value is the one used by 74xx processors. */
vscr_init(env, 0x00010000);
-
- /*
- * Register PCR to report POWERPC_EXCP_PRIV_REG instead of
- * POWERPC_EXCP_INVAL_SPR.
- */
- spr_register(env, SPR_PCR, "PCR",
- SPR_NOACCESS, SPR_NOACCESS,
- SPR_NOACCESS, SPR_NOACCESS,
- 0x00000000);
}
POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
--
2.0.0
- Re: [Qemu-devel] [PATCH v5 08/30] target-ppc: Add PMC7/8 to 970 class, (continued)
- [Qemu-devel] [PATCH v5 11/30] target-ppc: Remove check_pow_970FX, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 07/30] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 06/30] target-ppc: Add "POWER" prefix to MMCRA PMU registers, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 12/30] target-ppc: Enable PMU SPRs migration, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 10/30] target-ppc: Introduce and reuse generalized init_proc_book3s_64(), Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 14/30] target-ppc: Move POWER8 TCE Address control (TAR) to a helper, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 13/30] target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 15/30] target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers,
Alexey Kardashevskiy <=
- [Qemu-devel] [PATCH v5 16/30] target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 20/30] target-ppc: Add POWER8's TIR SPR, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 17/30] target-ppc: Make use of gen_spr_power5p_lpar() for POWER7/8, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 18/30] target-ppc: Switch POWER7/8 classes to use correct PMU SPRs, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 19/30] target-ppc: Refactor class init for POWER7/8, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 25/30] KVM: target-ppc: Enable TM state migration, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 23/30] target-ppc: Add POWER8's MMCR2/MMCRS SPRs, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 22/30] target-ppc: Enable FSCR facility check for TAR, Alexey Kardashevskiy, 2014/06/04