[Qemu-devel] [PATCH v5 18/30] target-ppc: Switch POWER7/8 classes to use correct PMU SPRs

[Alexey Kardashevskiy]

This replaces gen_spr_7xx() call (which registers 32bit SPRs) with
gen_spr_book3s_pmu() call.

This removes SPR_7XX_PMC5/6 as they are for 32bit and gen_spr_book3s_pmu()
already registers correct PMC5/6 SPRs.

This removes explicit MMCRA registration as gen_spr_book3s_pmu() does it
anyway.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: Tom Musta <address@hidden>
---
 target-ppc/translate_init.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 7d2eb1f..df90439 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7784,27 +7784,14 @@ static Property powerpc_servercpu_properties[] = {
 static void init_proc_POWER7 (CPUPPCState *env)
 {
     gen_spr_ne_601(env);
-    gen_spr_7xx(env);
     gen_spr_book3s_altivec(env);
     /* Time base */
     gen_tbl(env);
-#if !defined(CONFIG_USER_ONLY)
-    spr_register_kvm(env, SPR_POWER_MMCRA, "SPR_MMCRA",
-                     SPR_NOACCESS, SPR_NOACCESS,
-                     &spr_read_generic, &spr_write_generic,
-                     KVM_REG_PPC_MMCRA, 0x00000000);
-    spr_register_kvm(env, SPR_7XX_PMC5, "SPR_7XX_PMC5",
-                     SPR_NOACCESS, SPR_NOACCESS,
-                     &spr_read_generic, &spr_write_generic,
-                     KVM_REG_PPC_PMC5, 0x00000000);
-    spr_register_kvm(env, SPR_7XX_PMC6, "SPR_7XX_PMC6",
-                     SPR_NOACCESS, SPR_NOACCESS,
-                     &spr_read_generic, &spr_write_generic,
-                     KVM_REG_PPC_PMC6, 0x00000000);
-#endif /* !CONFIG_USER_ONLY */
     gen_spr_book3s_ids(env);
     gen_spr_book3s_purr(env);
     gen_spr_book3s_common(env);
+    gen_spr_book3s_pmu_sup(env);
+    gen_spr_book3s_pmu_user(env);
     gen_spr_power5p_common(env);
     gen_spr_power5p_lpar(env);
     gen_spr_power6_common(env);
-- 
2.0.0