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[Qemu-devel] [PATCH v5 29/30] spapr_hcall: Split h_set_mode()
From: |
Alexey Kardashevskiy |
Subject: |
[Qemu-devel] [PATCH v5 29/30] spapr_hcall: Split h_set_mode() |
Date: |
Wed, 4 Jun 2014 22:51:04 +1000 |
This moves H_SET_MODE_RESOURCE_LE handler to a separate function
as there are other "resources" coming and this is going to become ugly.
Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
Changes:
v2:
* s/becode/become/ in commit log
---
hw/ppc/spapr_hcall.c | 67 +++++++++++++++++++++++++++-------------------------
1 file changed, 35 insertions(+), 32 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index a7460ab..cff3b0f 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -712,46 +712,49 @@ static target_ulong h_logical_dcbf(PowerPCCPU *cpu,
sPAPREnvironment *spapr,
return H_SUCCESS;
}
+static target_ulong h_set_mode_resouce_le(PowerPCCPU *cpu,
+ target_ulong mflags,
+ target_ulong value1,
+ target_ulong value2)
+{
+ CPUState *cs;
+
+ if (value1) {
+ return H_P3;
+ }
+ if (value2) {
+ return H_P4;
+ }
+
+ switch (mflags) {
+ case H_SET_MODE_ENDIAN_BIG:
+ CPU_FOREACH(cs) {
+ set_spr(cs, SPR_LPCR, 0, LPCR_ILE);
+ }
+ return H_SUCCESS;
+
+ case H_SET_MODE_ENDIAN_LITTLE:
+ CPU_FOREACH(cs) {
+ set_spr(cs, SPR_LPCR, LPCR_ILE, LPCR_ILE);
+ }
+ return H_SUCCESS;
+ }
+
+ return H_UNSUPPORTED_FLAG;
+}
+
static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
- CPUState *cs;
- target_ulong mflags = args[0];
target_ulong resource = args[1];
- target_ulong value1 = args[2];
- target_ulong value2 = args[3];
target_ulong ret = H_P2;
- if (resource == H_SET_MODE_RESOURCE_LE) {
- if (value1) {
- ret = H_P3;
- goto out;
- }
- if (value2) {
- ret = H_P4;
- goto out;
- }
- switch (mflags) {
- case H_SET_MODE_ENDIAN_BIG:
- CPU_FOREACH(cs) {
- set_spr(cs, SPR_LPCR, 0, LPCR_ILE);
- }
- ret = H_SUCCESS;
- break;
-
- case H_SET_MODE_ENDIAN_LITTLE:
- CPU_FOREACH(cs) {
- set_spr(cs, SPR_LPCR, LPCR_ILE, LPCR_ILE);
- }
- ret = H_SUCCESS;
- break;
-
- default:
- ret = H_UNSUPPORTED_FLAG;
- }
+ switch (resource) {
+ case H_SET_MODE_RESOURCE_LE:
+ ret = h_set_mode_resouce_le(cpu, args[0], args[2], args[3]);
+ break;
}
-out:
return ret;
}
--
2.0.0
- Re: [Qemu-devel] [PATCH v5 22/30] target-ppc: Enable FSCR facility check for TAR, (continued)
- [Qemu-devel] [PATCH v5 21/30] target-ppc: Add POWER8's FSCR SPR, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 30/30] spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 24/30] target-ppc: Add POWER8's TM SPRs, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 27/30] target-ppc: Enable PPR and VRSAVE SPRs migration, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 26/30] target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 29/30] spapr_hcall: Split h_set_mode(),
Alexey Kardashevskiy <=
- Re: [Qemu-devel] [PATCH v5 00/30] book3s powerpc classes (970, power5, power7, power8) rework, Tom Musta, 2014/06/04
- [Qemu-devel] [PATCH v5 28/30] target-ppc: Enable DABRX SPR and limit it to <=POWER7, Alexey Kardashevskiy, 2014/06/04
- [Qemu-devel] [PATCH v5 02/30] target-ppc: Merge 970FX and 970MP into a single 970 class, Alexey Kardashevskiy, 2014/06/04