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Re: [Qemu-devel] [PATCH v3 00/12] Add i.MX6 (Single/Dual/Quad) support
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 00/12] Add i.MX6 (Single/Dual/Quad) support |
Date: |
Wed, 16 Mar 2016 11:04:33 +0000 |
On 1 March 2016 at 22:27, Jean-Christophe Dubois <address@hidden> wrote:
> This patch series adds support for the Freescale i.MX6 processor.
>
> For now we only support the following devices:
> * up to 4 Cortex A9 cores
> * A9 MPCORE (SCU, GIC, TWD)
> * 5 i.MX UARTs
> * 2 EPIT timers
> * 1 GPT timer
> * 7 GPIO controllers
> * 6 SDHC controllers
> * 5 SPI controllers
> * 1 CCM device
> * 1 SRC device
> * 3 I2C devices
> * various ROM/RAM areas.
I've added patches 1-5 and 8 to target-arm.next, since they've been reviewed
already; that will cut down the size of this series for subsequent versions.
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v3 10/12] i.MX: Add the Freescale SPI Controller, (continued)
[Qemu-devel] [PATCH v3 12/12] i.MX: Add sabrelite i.MX6 emulation., Jean-Christophe Dubois, 2016/03/01
[Qemu-devel] [PATCH v3 11/12] i.MX: Add i.MX6 SOC implementation., Jean-Christophe Dubois, 2016/03/01
Re: [Qemu-devel] [PATCH v3 00/12] Add i.MX6 (Single/Dual/Quad) support,
Peter Maydell <=