Re: [Qemu-devel] [PATCH 05/13] target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init

[Stafford Horne]

On Mon, Aug 26, 2019 at 05:07:37PM -0700, Richard Henderson wrote:
> These registers are read-only and implementation specific.
> Initiailize VR for the first time; take the OR1200 values
> from the verilog source.
> 
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: Stafford Horne <address@hidden>

> ---
>  target/openrisc/cpu.h        |  8 ++++----
>  target/openrisc/cpu.c        | 23 ++++++++++++++++-------
>  target/openrisc/sys_helper.c |  4 ++--
>  3 files changed, 22 insertions(+), 13 deletions(-)
> 
> diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
> index 755282f95d..18d7445e74 100644
> --- a/target/openrisc/cpu.h
> +++ b/target/openrisc/cpu.h
> @@ -260,10 +260,6 @@ typedef struct CPUOpenRISCState {
>      target_ulong sr_cy;       /* the SR_CY bit, values 0, 1.  */
>      target_long  sr_ov;       /* the SR_OV bit (in the sign bit only) */
>      uint32_t sr;              /* Supervisor register, without SR_{F,CY,OV} */
> -    uint32_t vr;              /* Version register */
> -    uint32_t upr;             /* Unit presence register */
> -    uint32_t dmmucfgr;        /* DMMU configure register */
> -    uint32_t immucfgr;        /* IMMU configure register */
>      uint32_t esr;             /* Exception supervisor register */
>      uint32_t evbar;           /* Exception vector base address register */
>      uint32_t pmr;             /* Power Management Register */
> @@ -283,7 +279,11 @@ typedef struct CPUOpenRISCState {
>      struct {} end_reset_fields;
>  
>      /* Fields from here on are preserved across CPU reset. */
> +    uint32_t vr;              /* Version register */
> +    uint32_t upr;             /* Unit presence register */
>      uint32_t cpucfgr;         /* CPU configure register */
> +    uint32_t dmmucfgr;        /* DMMU configure register */
> +    uint32_t immucfgr;        /* IMMU configure register */

Note for me, others, just moving these doesn't require updating the machine
serialization.