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[PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_sta
From: |
Peter Maydell |
Subject: |
[PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state |
Date: |
Tue, 22 Oct 2019 14:31:13 +0100 |
From: Richard Henderson <address@hidden>
Hoist the variable load for PSTATE into the existing test vs is_a64.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e2a62cf19a0..398e5f5d6df 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11197,7 +11197,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
ARMMMUIdx mmu_idx = arm_mmu_idx(env);
int current_el = arm_current_el(env);
int fp_el = fp_exception_el(env, current_el);
- uint32_t flags;
+ uint32_t flags, pstate_for_ss;
if (is_a64(env)) {
*pc = env->pc;
@@ -11205,6 +11205,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
if (cpu_isar_feature(aa64_bti, env_archcpu(env))) {
flags = FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype);
}
+ pstate_for_ss = env->pstate;
} else {
*pc = env->regs[15];
@@ -11257,9 +11258,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
|| arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
}
+ pstate_for_ss = env->uncached_cpsr;
}
- /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
+ /*
+ * The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
* states defined in the ARM ARM for software singlestep:
* SS_ACTIVE PSTATE.SS State
* 0 x Inactive (the TB flag for SS is always 0)
@@ -11267,16 +11270,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
* 1 1 Active-not-pending
* SS_ACTIVE is set in hflags; PSTATE_SS is computed every TB.
*/
- if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE)) {
- if (is_a64(env)) {
- if (env->pstate & PSTATE_SS) {
- flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
- }
- } else {
- if (env->uncached_cpsr & PSTATE_SS) {
- flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
- }
- }
+ if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE) &&
+ (pstate_for_ss & PSTATE_SS)) {
+ flags = FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1);
}
*pflags = flags;
--
2.20.1
- [PULL 10/41] hw/m68k/mcf5208.c: Switch to transaction-based ptimer API, (continued)
- [PULL 10/41] hw/m68k/mcf5208.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 11/41] target/arm: Split out rebuild_hflags_common, Peter Maydell, 2019/10/22
- [PULL 13/41] target/arm: Split out rebuild_hflags_common_32, Peter Maydell, 2019/10/22
- [PULL 12/41] target/arm: Split out rebuild_hflags_a64, Peter Maydell, 2019/10/22
- [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian, Peter Maydell, 2019/10/22
- [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 15/41] target/arm: Split out rebuild_hflags_m32, Peter Maydell, 2019/10/22
- [PULL 17/41] target/arm: Split out rebuild_hflags_a32, Peter Maydell, 2019/10/22
- [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile, Peter Maydell, 2019/10/22
- [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state,
Peter Maydell <=
- [PULL 22/41] target/arm: Add arm_rebuild_hflags, Peter Maydell, 2019/10/22
- [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Peter Maydell, 2019/10/22
- [PULL 23/41] target/arm: Split out arm_mmu_idx_el, Peter Maydell, 2019/10/22
- [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Peter Maydell, 2019/10/22
- [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 26/41] target/arm: Rebuild hflags at EL changes, Peter Maydell, 2019/10/22
- [PULL 27/41] target/arm: Rebuild hflags at MSR writes, Peter Maydell, 2019/10/22
- [PULL 28/41] target/arm: Rebuild hflags at CPSR writes, Peter Maydell, 2019/10/22
- [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes, Peter Maydell, 2019/10/22
- [PULL 30/41] target/arm: Rebuild hflags for M-profile, Peter Maydell, 2019/10/22