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[PULL 38/41] hw/arm/collie: Create the RAM in the board
From: |
Peter Maydell |
Subject: |
[PULL 38/41] hw/arm/collie: Create the RAM in the board |
Date: |
Tue, 22 Oct 2019 14:31:31 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
The SDRAM is incorrectly created in the SA1110 SoC.
Move its creation in the board code, this will later allow the
board to have the QOM ownership of the RAM.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/strongarm.h | 4 +---
hw/arm/collie.c | 8 ++++++--
hw/arm/strongarm.c | 7 +------
3 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h
index e98840b461a..192821f6aab 100644
--- a/hw/arm/strongarm.h
+++ b/hw/arm/strongarm.h
@@ -55,7 +55,6 @@ enum {
typedef struct {
ARMCPU *cpu;
- MemoryRegion sdram;
DeviceState *pic;
DeviceState *gpio;
DeviceState *ppc;
@@ -63,7 +62,6 @@ typedef struct {
SSIBus *ssp_bus;
} StrongARMState;
-StrongARMState *sa1110_init(MemoryRegion *sysmem,
- unsigned int sdram_size, const char *rev);
+StrongARMState *sa1110_init(const char *cpu_type);
#endif
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index b1288ccea80..970a4405ccf 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -27,9 +27,13 @@ static void collie_init(MachineState *machine)
{
StrongARMState *s;
DriveInfo *dinfo;
- MemoryRegion *sysmem = get_system_memory();
+ MemoryRegion *sdram = g_new(MemoryRegion, 1);
- s = sa1110_init(sysmem, collie_binfo.ram_size, machine->cpu_type);
+ s = sa1110_init(machine->cpu_type);
+
+ memory_region_allocate_system_memory(sdram, NULL, "strongarm.sdram",
+ collie_binfo.ram_size);
+ memory_region_add_subregion(get_system_memory(), SA_SDCS0, sdram);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index dc65d88a657..6bee0349149 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -1586,8 +1586,7 @@ static const TypeInfo strongarm_ssp_info = {
};
/* Main CPU functions */
-StrongARMState *sa1110_init(MemoryRegion *sysmem,
- unsigned int sdram_size, const char *cpu_type)
+StrongARMState *sa1110_init(const char *cpu_type)
{
StrongARMState *s;
int i;
@@ -1601,10 +1600,6 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
s->cpu = ARM_CPU(cpu_create(cpu_type));
- memory_region_allocate_system_memory(&s->sdram, NULL, "strongarm.sdram",
- sdram_size);
- memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
-
s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ),
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ),
--
2.20.1
- [PULL 28/41] target/arm: Rebuild hflags at CPSR writes, (continued)
- [PULL 28/41] target/arm: Rebuild hflags at CPSR writes, Peter Maydell, 2019/10/22
- [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes, Peter Maydell, 2019/10/22
- [PULL 30/41] target/arm: Rebuild hflags for M-profile, Peter Maydell, 2019/10/22
- [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC, Peter Maydell, 2019/10/22
- [PULL 32/41] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 33/41] hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions, Peter Maydell, 2019/10/22
- [PULL 34/41] hw/sd/sdhci: Add dummy Samsung SDHCI controller, Peter Maydell, 2019/10/22
- [PULL 35/41] hw/arm/exynos4210: Use the Samsung s3c SDHCI controller, Peter Maydell, 2019/10/22
- [PULL 36/41] hw/arm/xilinx_zynq: Use the IEC binary prefix definitions, Peter Maydell, 2019/10/22
- [PULL 37/41] hw/arm/mps2: Use the IEC binary prefix definitions, Peter Maydell, 2019/10/22
- [PULL 38/41] hw/arm/collie: Create the RAM in the board,
Peter Maydell <=
- [PULL 39/41] hw/arm/omap2: Create the RAM in the board, Peter Maydell, 2019/10/22
- [PULL 41/41] hw/arm/digic4: Inline digic4_board_setup_ram() function, Peter Maydell, 2019/10/22
- [PULL 40/41] hw/arm/omap1: Create the RAM in the board, Peter Maydell, 2019/10/22