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Re: [PULL 0/7] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [PULL 0/7] target-arm queue |
Date: |
Tue, 19 Nov 2019 15:55:21 +0000 |
On Tue, 19 Nov 2019 at 13:31, Peter Maydell <address@hidden> wrote:
>
> Target-arm queue for rc2 -- just some minor bugfixes.
>
> thanks
> -- PMM
>
> The following changes since commit 6e5d4999c761ffa082f60d72a14e5c953515b417:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-11-19'
> into staging (2019-11-19 11:29:01 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20191119
>
> for you to fetch changes up to 04c9c81b8fa2ee33f59a26265700fae6fc646062:
>
> target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY (2019-11-19
> 13:20:28 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Support EL0 v7m msr/mrs for CONFIG_USER_ONLY
> * Relax r13 restriction for ldrex/strex for v8.0
> * Do not reject rt == rt2 for strexd
> * net/cadence_gem: Set PHY autonegotiation restart status
> * ssi: xilinx_spips: Skip spi bus update for a few register writes
> * pl031: Expose RTCICR as proper WC register
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2
for any user-visible changes.
-- PMM
- [PULL 0/7] target-arm queue, Peter Maydell, 2019/11/19
- [PULL 1/7] pl031: Expose RTCICR as proper WC register, Peter Maydell, 2019/11/19
- [PULL 4/7] net/cadence_gem: Set PHY autonegotiation restart status, Peter Maydell, 2019/11/19
- [PULL 3/7] ssi: xilinx_spips: Skip spi bus update for a few register writes, Peter Maydell, 2019/11/19
- [PULL 2/7] target/arm: Merge arm_cpu_vq_map_next_smaller into sole caller, Peter Maydell, 2019/11/19
- [PULL 5/7] target/arm: Do not reject rt == rt2 for strexd, Peter Maydell, 2019/11/19
- [PULL 6/7] target/arm: Relax r13 restriction for ldrex/strex for v8.0, Peter Maydell, 2019/11/19
- [PULL 7/7] target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY, Peter Maydell, 2019/11/19
- Re: [PULL 0/7] target-arm queue,
Peter Maydell <=