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Re: [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs
From: |
Richard Henderson |
Subject: |
Re: [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs |
Date: |
Wed, 4 Dec 2019 08:19:54 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.1 |
On 12/4/19 7:53 AM, Alex Bennée wrote:
>
> Richard Henderson <address@hidden> writes:
>
>> On 12/4/19 3:43 AM, Alex Bennée wrote:
> <snip>
>>>> void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int
>>>> max_insns)
>>>> {
>>>> - DisasContext dc;
>>>> + DisasContext dc = { };
>>>
>>> We seemed to have dropped an initialise here which seems unrelated.
>>
>> Added, not dropped.
>
> But is it related to this patch or fixing another bug?
It is related to the patch.
We used to initialize all of the a32 and m32 fields in DisasContext by
assignment. Now we only initialize either the a32 or m32 by assignment,
because the bits overlap in tbflags. So zero out the other bits here.
I'll add this to the commit message.
r~
- [PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*, (continued)
[PATCH v4 16/40] target/arm: Rearrange ARMMMUIdxBit, Richard Henderson, 2019/12/02
[PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Richard Henderson, 2019/12/02
Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Peter Maydell, 2019/12/06
[PATCH v4 21/40] target/arm: Update arm_sctlr for VHE, Richard Henderson, 2019/12/02