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[PATCH 4/9] target/mips: Simplify MSA TCG logic
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 4/9] target/mips: Simplify MSA TCG logic |
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Date: |
Wed, 2 Dec 2020 19:44:10 +0100 |
Only decode MSA opcodes if MSA is present (implemented).
Now than check_msa_access() will only be called if MSA is
present, the only way to have MIPS_HFLAG_MSA unset is if
MSA is disabled (bit CP0C5_MSAEn cleared, see previous
commit). Therefore we can remove the 'reserved instruction'
exception.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/translate.c | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 803ffefba2c..a05c25e50b8 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28697,13 +28697,8 @@ static inline int check_msa_access(DisasContext *ctx)
}
if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) {
- if (ctx->insn_flags & ASE_MSA) {
- generate_exception_end(ctx, EXCP_MSADIS);
- return 0;
- } else {
- generate_exception_end(ctx, EXCP_RI);
- return 0;
- }
+ generate_exception_end(ctx, EXCP_MSADIS);
+ return 0;
}
return 1;
}
@@ -30547,7 +30542,7 @@ static void gen_msa_vec(CPUMIPSState *env, DisasContext
*ctx)
static void gen_msa(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opcode = ctx->opcode;
- check_insn(ctx, ASE_MSA);
+
check_msa_access(ctx);
switch (MASK_MSA_MINOR(opcode)) {
@@ -31194,9 +31189,10 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
case OPC_BNZ_H:
case OPC_BNZ_W:
case OPC_BNZ_D:
- check_insn(ctx, ASE_MSA);
- gen_msa_branch(env, ctx, op1);
- break;
+ if (ase_msa_available(env)) {
+ gen_msa_branch(env, ctx, op1);
+ break;
+ }
default:
MIPS_INVAL("cp1");
generate_exception_end(ctx, EXCP_RI);
@@ -31385,7 +31381,9 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
#endif
} else {
/* MDMX: Not implemented. */
- gen_msa(env, ctx);
+ if (ase_msa_available(env)) {
+ gen_msa(env, ctx);
+ }
}
break;
case OPC_PCREL:
--
2.26.2
- [PATCH 0/9] target/mips: Simplify MSA TCG logic, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 1/9] target/mips: Introduce ase_msa_available() helper, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 2/9] target/mips: Simplify msa_reset(), Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 4/9] target/mips: Simplify MSA TCG logic,
Philippe Mathieu-Daudé <=
- [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init(), Philippe Mathieu-Daudé, 2020/12/02