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[PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init() |
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Date: |
Wed, 2 Dec 2020 19:44:13 +0100 |
Extract the logic initialization of the MSA registers from
the generic initialization.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/translate.c | 35 ++++++++++++++++++++---------------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 41880f21abd..a5112acc351 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -31672,6 +31672,24 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
}
}
+static void msa_translate_init(void)
+{
+ int i;
+
+ for (i = 0; i < 32; i++) {
+ int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
+
+ /*
+ * The MSA vector registers are mapped on the
+ * scalar floating-point unit (FPU) registers.
+ */
+ msa_wr_d[i * 2] = fpu_f64[i];
+ off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
+ msa_wr_d[i * 2 + 1] =
+ tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
+ }
+}
+
void mips_tcg_init(void)
{
int i;
@@ -31685,22 +31703,9 @@ void mips_tcg_init(void)
for (i = 0; i < 32; i++) {
int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
- fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2]);
+ fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
}
- /* MSA */
- for (i = 0; i < 32; i++) {
- int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
-
- /*
- * The MSA vector registers are mapped on the
- * scalar floating-point unit (FPU) registers.
- */
- msa_wr_d[i * 2] = fpu_f64[i];
- off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
- msa_wr_d[i * 2 + 1] =
- tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
- }
-
+ msa_translate_init();
cpu_PC = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, active_tc.PC), "PC");
for (i = 0; i < MIPS_DSP_ACC; i++) {
--
2.26.2
- [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, (continued)
- [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init(),
Philippe Mathieu-Daudé <=
[PATCH 8/9] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods, Philippe Mathieu-Daudé, 2020/12/02
[PATCH 9/9] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ(), Philippe Mathieu-Daudé, 2020/12/02
Re: [PATCH 0/9] target/mips: Simplify MSA TCG logic, Jiaxun Yang, 2020/12/02