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[PULL 33/49] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs,
From: |
Peter Maydell |
Subject: |
[PULL 33/49] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type |
Date: |
Fri, 5 Mar 2021 17:14:59 +0000 |
In the mps2-tz board code, we handle devices whose interrupt lines
must be wired to all CPUs by creating IRQ splitter devices for the
AN521, because it has 2 CPUs, but wiring the device IRQ directly to
the SSE/IoTKit input for the AN505, which has only 1 CPU.
We can avoid making an explicit check on the board type constant by
instead creating and using the IRQ splitters for any board with more
than 1 CPU. This avoids having to add extra cases to the
conditionals every time we add new boards.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-9-peter.maydell@linaro.org
---
hw/arm/mps2-tz.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 87a05d2c19d..bfda944000e 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -139,17 +139,14 @@ static void make_ram_alias(MemoryRegion *mr, const char
*name,
static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
{
/* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */
- MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
+ MachineClass *mc = MACHINE_GET_CLASS(mms);
assert(irqno < MPS2TZ_NUMIRQ);
- switch (mmc->fpga_type) {
- case FPGA_AN505:
- return qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", irqno);
- case FPGA_AN521:
+ if (mc->max_cpus > 1) {
return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0);
- default:
- g_assert_not_reached();
+ } else {
+ return qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", irqno);
}
}
@@ -437,10 +434,12 @@ static void mps2tz_common_init(MachineState *machine)
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
/*
- * The AN521 needs us to create splitters to feed the IRQ inputs
- * for each CPU in the SSE-200 from each device in the board.
+ * If this board has more than one CPU, then we need to create splitters
+ * to feed the IRQ inputs for each CPU in the SSE from each device in the
+ * board. If there is only one CPU, we can just wire the device IRQ
+ * directly to the SSE's IRQ input.
*/
- if (mmc->fpga_type == FPGA_AN521) {
+ if (mc->max_cpus > 1) {
for (i = 0; i < MPS2TZ_NUMIRQ; i++) {
char *name = g_strdup_printf("mps2-irq-splitter%d", i);
SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
--
2.20.1
- [PULL 34/49] hw/arm/mps2-tz: Make number of IRQs board-specific, (continued)
- [PULL 34/49] hw/arm/mps2-tz: Make number of IRQs board-specific, Peter Maydell, 2021/03/05
- [PULL 35/49] hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524, Peter Maydell, 2021/03/05
- [PULL 46/49] hw/arm/mps2-tz: Stub out USB controller for mps3-an524, Peter Maydell, 2021/03/05
- [PULL 38/49] hw/arm/mps2-tz: Move device IRQ info to data structures, Peter Maydell, 2021/03/05
- [PULL 43/49] hw/arm/mps2-tz: Support ROMs as well as RAMs, Peter Maydell, 2021/03/05
- [PULL 44/49] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo, Peter Maydell, 2021/03/05
- [PULL 49/49] hw/arm/mps2: Update old infocenter.arm.com URLs, Peter Maydell, 2021/03/05
- [PULL 47/49] hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524, Peter Maydell, 2021/03/05
- [PULL 40/49] hw/arm/mps2-tz: Allow boards to have different PPCInfo data, Peter Maydell, 2021/03/05
- [PULL 45/49] hw/arm/mps2-tz: Add new mps3-an524 board, Peter Maydell, 2021/03/05
- [PULL 33/49] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type,
Peter Maydell <=
- [PULL 36/49] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI, Peter Maydell, 2021/03/05
- [PULL 48/49] docs/system/arm/mps2.rst: Document the new mps3-an524 board, Peter Maydell, 2021/03/05
- [PULL 25/49] hw/display/tcx: Drop unnecessary code for handling BGR format outputs, Peter Maydell, 2021/03/05
- [PULL 42/49] hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data, Peter Maydell, 2021/03/05
- [PULL 39/49] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs, Peter Maydell, 2021/03/05
- [PULL 41/49] hw/arm/mps2-tz: Make RAM arrangement board-specific, Peter Maydell, 2021/03/05
- Re: [PULL 00/49] target-arm queue, no-reply, 2021/03/05