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[PULL 39/49] hw/arm/mps2-tz: Size the uart-irq-orgate based on the numbe
From: |
Peter Maydell |
Subject: |
[PULL 39/49] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs |
Date: |
Fri, 5 Mar 2021 17:15:05 +0000 |
We create an OR gate to wire together the overflow IRQs for all the
UARTs on the board; this has to have twice the number of inputs as
there are UARTs, since each UART feeds it a TX overflow and an RX
overflow interrupt line. Replace the hardcoded '10' with a
calculation based on the size of the uart[] array in the
MPS2TZMachineState. (We rely on OR gate inputs that are never wired
up or asserted being treated as always-zero.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-15-peter.maydell@linaro.org
---
hw/arm/mps2-tz.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 53886d66b61..1c1fc34dd53 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -516,13 +516,18 @@ static void mps2tz_common_init(MachineState *machine)
*/
memory_region_add_subregion(system_memory, 0x80000000, machine->ram);
- /* The overflow IRQs for all UARTs are ORed together.
+ /*
+ * The overflow IRQs for all UARTs are ORed together.
* Tx, Rx and "combined" IRQs are sent to the NVIC separately.
- * Create the OR gate for this.
+ * Create the OR gate for this: it has one input for the TX overflow
+ * and one for the RX overflow for each UART we might have.
+ * (If the board has fewer than the maximum possible number of UARTs
+ * those inputs are never wired up and are treated as always-zero.)
*/
object_initialize_child(OBJECT(mms), "uart-irq-orgate",
&mms->uart_irq_orgate, TYPE_OR_IRQ);
- object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines", 10,
+ object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines",
+ 2 * ARRAY_SIZE(mms->uart),
&error_fatal);
qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0,
--
2.20.1
- [PULL 44/49] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo, (continued)
- [PULL 44/49] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo, Peter Maydell, 2021/03/05
- [PULL 49/49] hw/arm/mps2: Update old infocenter.arm.com URLs, Peter Maydell, 2021/03/05
- [PULL 47/49] hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524, Peter Maydell, 2021/03/05
- [PULL 40/49] hw/arm/mps2-tz: Allow boards to have different PPCInfo data, Peter Maydell, 2021/03/05
- [PULL 45/49] hw/arm/mps2-tz: Add new mps3-an524 board, Peter Maydell, 2021/03/05
- [PULL 33/49] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type, Peter Maydell, 2021/03/05
- [PULL 36/49] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI, Peter Maydell, 2021/03/05
- [PULL 48/49] docs/system/arm/mps2.rst: Document the new mps3-an524 board, Peter Maydell, 2021/03/05
- [PULL 25/49] hw/display/tcx: Drop unnecessary code for handling BGR format outputs, Peter Maydell, 2021/03/05
- [PULL 42/49] hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data, Peter Maydell, 2021/03/05
- [PULL 39/49] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs,
Peter Maydell <=
- [PULL 41/49] hw/arm/mps2-tz: Make RAM arrangement board-specific, Peter Maydell, 2021/03/05
- Re: [PULL 00/49] target-arm queue, no-reply, 2021/03/05