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[PULL 07/27] target/mips/meson: Restrict mips-semi.c to TCG
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 07/27] target/mips/meson: Restrict mips-semi.c to TCG |
Date: |
Sat, 13 Mar 2021 20:48:09 +0100 |
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 75c16524606..53580633ce0 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -31,10 +31,10 @@
'addr.c',
'cp0_timer.c',
'machine.c',
- 'mips-semi.c',
))
mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
'cp0_helper.c',
+ 'mips-semi.c',
))
mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
--
2.26.2
- [PULL 00/27] MIPS patches for 2021-03-13, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 01/27] hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize(), Philippe Mathieu-Daudé, 2021/03/13
- [PULL 02/27] hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 03/27] hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 04/27] hw/mips/gt64xxx: Rename trace events related to interrupt registers, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 05/27] hw/mips/gt64xxx: Trace accesses to ISD registers, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 06/27] target/mips/meson: Introduce mips_tcg source set, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 07/27] target/mips/meson: Restrict mips-semi.c to TCG,
Philippe Mathieu-Daudé <=
- [PULL 08/27] target/mips: Rewrite complex ifdef'ry, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 09/27] target/mips: Remove XBurst Media eXtension Unit dead code, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 10/27] target/mips: Remove unused CPUMIPSState* from MXU functions, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 11/27] target/mips: Pass instruction opcode to decode_opc_mxu(), Philippe Mathieu-Daudé, 2021/03/13
- [PULL 12/27] target/mips: Use OPC_MUL instead of OPC__MXU_MUL, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 13/27] target/mips: Move MUL opcode check from decode_mxu() to decode_legacy(), Philippe Mathieu-Daudé, 2021/03/13
- [PULL 14/27] target/mips: Rename decode_opc_mxu() as decode_ase_mxu(), Philippe Mathieu-Daudé, 2021/03/13
- [PULL 15/27] target/mips: Convert decode_ase_mxu() to decodetree prototype, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 16/27] target/mips: Simplify decode_opc_mxu() ifdef'ry, Philippe Mathieu-Daudé, 2021/03/13
- [PULL 17/27] target/mips: Introduce mxu_translate_init() helper, Philippe Mathieu-Daudé, 2021/03/13