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[PATCH v2 10/21] Hexagon (target/hexagon) replace float32_mul_pow2 with
From: |
Taylor Simpson |
Subject: |
[PATCH v2 10/21] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn |
Date: |
Wed, 31 Mar 2021 22:53:22 -0500 |
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/arch.c | 28 +++++++++++-----------------
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/target/hexagon/arch.c b/target/hexagon/arch.c
index bb51f19..40b6e3d 100644
--- a/target/hexagon/arch.c
+++ b/target/hexagon/arch.c
@@ -143,12 +143,6 @@ void arch_fpop_end(CPUHexagonState *env)
}
}
-static float32 float32_mul_pow2(float32 a, uint32_t p, float_status *fp_status)
-{
- float32 b = make_float32((SF_BIAS + p) << SF_MANTBITS);
- return float32_mul(a, b, fp_status);
-}
-
int arch_sf_recip_common(float32 *Rs, float32 *Rt, float32 *Rd, int *adjust,
float_status *fp_status)
{
@@ -217,22 +211,22 @@ int arch_sf_recip_common(float32 *Rs, float32 *Rt,
float32 *Rd, int *adjust,
if ((n_exp - d_exp + SF_BIAS) <= SF_MANTBITS) {
/* Near quotient underflow / inexact Q */
PeV = 0x80;
- RtV = float32_mul_pow2(RtV, -64, fp_status);
- RsV = float32_mul_pow2(RsV, 64, fp_status);
+ RtV = float32_scalbn(RtV, -64, fp_status);
+ RsV = float32_scalbn(RsV, 64, fp_status);
} else if ((n_exp - d_exp + SF_BIAS) > (SF_MAXEXP - 24)) {
/* Near quotient overflow */
PeV = 0x40;
- RtV = float32_mul_pow2(RtV, 32, fp_status);
- RsV = float32_mul_pow2(RsV, -32, fp_status);
+ RtV = float32_scalbn(RtV, 32, fp_status);
+ RsV = float32_scalbn(RsV, -32, fp_status);
} else if (n_exp <= SF_MANTBITS + 2) {
- RtV = float32_mul_pow2(RtV, 64, fp_status);
- RsV = float32_mul_pow2(RsV, 64, fp_status);
+ RtV = float32_scalbn(RtV, 64, fp_status);
+ RsV = float32_scalbn(RsV, 64, fp_status);
} else if (d_exp <= 1) {
- RtV = float32_mul_pow2(RtV, 32, fp_status);
- RsV = float32_mul_pow2(RsV, 32, fp_status);
+ RtV = float32_scalbn(RtV, 32, fp_status);
+ RsV = float32_scalbn(RsV, 32, fp_status);
} else if (d_exp > 252) {
- RtV = float32_mul_pow2(RtV, -32, fp_status);
- RsV = float32_mul_pow2(RsV, -32, fp_status);
+ RtV = float32_scalbn(RtV, -32, fp_status);
+ RsV = float32_scalbn(RsV, -32, fp_status);
}
RdV = 0;
ret = 1;
@@ -274,7 +268,7 @@ int arch_sf_invsqrt_common(float32 *Rs, float32 *Rd, int
*adjust,
/* Basic checks passed */
r_exp = float32_getexp(RsV);
if (r_exp <= 24) {
- RsV = float32_mul_pow2(RsV, 64, fp_status);
+ RsV = float32_scalbn(RsV, 64, fp_status);
PeV = 0xe0;
}
RdV = 0;
--
2.7.4
- [PATCH v2 00/21] Hexagon (target/hexagon) update, Taylor Simpson, 2021/03/31
- [PATCH v2 14/21] Hexagon (target/hexagon) add A5_ACS (vacsh), Taylor Simpson, 2021/03/31
- [PATCH v2 10/21] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn,
Taylor Simpson <=
- [PATCH v2 02/21] Hexagon (target/hexagon) remove unnecessary inline directives, Taylor Simpson, 2021/03/31
- [PATCH v2 07/21] Hexagon (target/hexagon) remove unused carry_from_add64 function, Taylor Simpson, 2021/03/31
- [PATCH v2 06/21] Hexagon (target/hexagon) change variables from int to bool when appropriate, Taylor Simpson, 2021/03/31
- [PATCH v2 11/21] Hexagon (target/hexagon) use softfloat for float-to-int conversions, Taylor Simpson, 2021/03/31
- [PATCH v2 13/21] Hexagon (target/hexagon) add F2_sfinvsqrta, Taylor Simpson, 2021/03/31
- [PATCH v2 03/21] Hexagon (target/hexagon) use env_archcpu and env_cpu, Taylor Simpson, 2021/03/31
- [PATCH v2 04/21] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN, Taylor Simpson, 2021/03/31
- [PATCH v2 01/21] Hexagon (target/hexagon) TCG generation cleanup, Taylor Simpson, 2021/03/31
- [PATCH v2 05/21] Hexagon (target/hexagon) decide if pred has been written at TCG gen time, Taylor Simpson, 2021/03/31
- [PATCH v2 08/21] Hexagon (target/hexagon) change type of softfloat_roundingmodes, Taylor Simpson, 2021/03/31