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[PATCH v2 00/21] Hexagon (target/hexagon) update
From: |
Taylor Simpson |
Subject: |
[PATCH v2 00/21] Hexagon (target/hexagon) update |
Date: |
Wed, 31 Mar 2021 22:53:12 -0500 |
This patch series is a significant update for the Hexagon target
The first 10 patches address feedback from Richard Henderson
<richard.henderson@linaro.org>
The next 6 patches add the remaining instructions for the Hexagon
scalar core
The patches are logically independent but are organized as a series to
avoid potential confilcts if they are merged out of order.
Note that the new test cases require an update toolchain/container.
*** Changes in v2 ***
Address feedback from Richard Henderson <richard.henderson@linaro.org>
Break utility function (arch.c) changes into 2 separate patches
Change bit-reverse addressing from TCG generation to helper
Change loadalign[bh] to use shift+deposit
Remove fGET_TCG_tmp
Remove unneeded ireg and tmp variables
Remove unused one variable from gen_log_predicated_reg_write
Rename gen_exception to gen_exception_raw
Remove unreachable tcg_gen_exit_tb
Remove redundant PC assignment
Remove TARGET_HEXAGON code from parts_silence_nan
Change roundrom to uint8_t in arch_recip_lookup and arch_invsqrt_lookup
Rewrite fGEN_TCG_addp_c/fGEN_TCG_subp_c using tcg_gen_add2_i64
Remove gen_carry_from_add64()
Break "instructions with multiple definitions" into multiple patches
Fix fINSERT_RANGE macro
Expand macros inside GET_EA_pci, GET_EA_pcr
Change fGEN_TCG_PCR to fGEN_TCG_LOAD_pcr to be consistent with other macros
Cleanup load and unpack implementation
Cleanup load into shifted register implementation
Cleanup brev.c test case
Change sfinvsqrta/sfrecipa to use a single helper
Cleanup vacsh helpers
Taylor Simpson (21):
Hexagon (target/hexagon) TCG generation cleanup
Hexagon (target/hexagon) remove unnecessary inline directives
Hexagon (target/hexagon) use env_archcpu and env_cpu
Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN
Hexagon (target/hexagon) decide if pred has been written at TCG gen
time
Hexagon (target/hexagon) change variables from int to bool when
appropriate
Hexagon (target/hexagon) remove unused carry_from_add64 function
Hexagon (target/hexagon) change type of softfloat_roundingmodes
Hexagon (target/hexagon) use softfloat default NaN and tininess
Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn
Hexagon (target/hexagon) use softfloat for float-to-int conversions
Hexagon (target/hexagon) add F2_sfrecipa instruction
Hexagon (target/hexagon) add F2_sfinvsqrta
Hexagon (target/hexagon) add A5_ACS (vacsh)
Hexagon (target/hexagon) add A6_vminub_RdP
Hexagon (target/hexagon) add A4_addp_c/A4_subp_c
Hexagon (target/hexagon) circular addressing
Hexagon (target/hexagon) bit reverse (brev) addressing
Hexagon (target/hexagon) load and unpack bytes instructions
Hexagon (target/hexagon) load into shifted register instructions
Hexagon (target/hexagon) CABAC decode bin
fpu/softfloat-specialize.c.inc | 3 +
linux-user/hexagon/cpu_loop.c | 2 +-
target/hexagon/arch.c | 191 +++++++++++---
target/hexagon/arch.h | 7 +-
target/hexagon/conv_emu.c | 177 -------------
target/hexagon/conv_emu.h | 31 ---
target/hexagon/cpu.c | 14 +-
target/hexagon/cpu.h | 5 -
target/hexagon/cpu_bits.h | 2 +-
target/hexagon/decode.c | 80 +++---
target/hexagon/fma_emu.c | 40 +--
target/hexagon/gen_tcg.h | 420 +++++++++++++++++++++++++++++-
target/hexagon/gen_tcg_funcs.py | 2 +-
target/hexagon/genptr.c | 182 ++++++++++++-
target/hexagon/helper.h | 21 +-
target/hexagon/imported/alu.idef | 44 ++++
target/hexagon/imported/encode_pp.def | 30 +++
target/hexagon/imported/float.idef | 32 +++
target/hexagon/imported/ldst.idef | 68 +++++
target/hexagon/imported/macros.def | 47 ++++
target/hexagon/imported/shift.idef | 47 ++++
target/hexagon/insn.h | 21 +-
target/hexagon/macros.h | 118 ++++++++-
target/hexagon/meson.build | 1 -
target/hexagon/op_helper.c | 342 ++++++++++++++++--------
target/hexagon/translate.c | 79 +++---
target/hexagon/translate.h | 7 +-
tests/tcg/hexagon/Makefile.target | 5 +
tests/tcg/hexagon/brev.c | 190 ++++++++++++++
tests/tcg/hexagon/circ.c | 391 ++++++++++++++++++++++++++++
tests/tcg/hexagon/fpstuff.c | 242 +++++++++++++++++
tests/tcg/hexagon/load_align.c | 415 +++++++++++++++++++++++++++++
tests/tcg/hexagon/load_unpack.c | 474 ++++++++++++++++++++++++++++++++++
tests/tcg/hexagon/misc.c | 47 ++++
tests/tcg/hexagon/multi_result.c | 275 ++++++++++++++++++++
35 files changed, 3560 insertions(+), 492 deletions(-)
delete mode 100644 target/hexagon/conv_emu.c
delete mode 100644 target/hexagon/conv_emu.h
create mode 100644 tests/tcg/hexagon/brev.c
create mode 100644 tests/tcg/hexagon/circ.c
create mode 100644 tests/tcg/hexagon/load_align.c
create mode 100644 tests/tcg/hexagon/load_unpack.c
create mode 100644 tests/tcg/hexagon/multi_result.c
--
2.7.4
- [PATCH v2 00/21] Hexagon (target/hexagon) update,
Taylor Simpson <=
- [PATCH v2 14/21] Hexagon (target/hexagon) add A5_ACS (vacsh), Taylor Simpson, 2021/03/31
- [PATCH v2 10/21] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn, Taylor Simpson, 2021/03/31
- [PATCH v2 02/21] Hexagon (target/hexagon) remove unnecessary inline directives, Taylor Simpson, 2021/03/31
- [PATCH v2 07/21] Hexagon (target/hexagon) remove unused carry_from_add64 function, Taylor Simpson, 2021/03/31
- [PATCH v2 06/21] Hexagon (target/hexagon) change variables from int to bool when appropriate, Taylor Simpson, 2021/03/31
- [PATCH v2 11/21] Hexagon (target/hexagon) use softfloat for float-to-int conversions, Taylor Simpson, 2021/03/31
- [PATCH v2 13/21] Hexagon (target/hexagon) add F2_sfinvsqrta, Taylor Simpson, 2021/03/31
- [PATCH v2 03/21] Hexagon (target/hexagon) use env_archcpu and env_cpu, Taylor Simpson, 2021/03/31
- [PATCH v2 04/21] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN, Taylor Simpson, 2021/03/31
- [PATCH v2 01/21] Hexagon (target/hexagon) TCG generation cleanup, Taylor Simpson, 2021/03/31