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[PULL 28/28] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec
From: |
Richard Henderson |
Subject: |
[PULL 28/28] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec |
Date: |
Wed, 6 Oct 2021 08:20:14 -0700 |
This is via expansion; don't actually set TCG_TARGET_HAS_cmpsel_vec.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index ae132e1b75..8938c446c8 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2869,6 +2869,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
case INDEX_op_xor_vec:
return 1;
case INDEX_op_cmp_vec:
+ case INDEX_op_cmpsel_vec:
case INDEX_op_rotrv_vec:
return -1;
case INDEX_op_mul_vec:
@@ -2931,6 +2932,21 @@ static void expand_vec_cmp(TCGType type, unsigned vece,
TCGv_vec v0,
}
}
+static void expand_vec_cmpsel(TCGType type, unsigned vece, TCGv_vec v0,
+ TCGv_vec c1, TCGv_vec c2,
+ TCGv_vec v3, TCGv_vec v4, TCGCond cond)
+{
+ TCGv_vec t = tcg_temp_new_vec(type);
+
+ if (expand_vec_cmp_noinv(type, vece, t, c1, c2, cond)) {
+ /* Invert the sense of the compare by swapping arguments. */
+ tcg_gen_bitsel_vec(vece, v0, t, v4, v3);
+ } else {
+ tcg_gen_bitsel_vec(vece, v0, t, v3, v4);
+ }
+ tcg_temp_free_vec(t);
+}
+
static void expand_vec_sat(TCGType type, unsigned vece, TCGv_vec v0,
TCGv_vec v1, TCGv_vec v2, TCGOpcode add_sub_opc)
{
@@ -2972,7 +2988,7 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type,
unsigned vece,
TCGArg a0, ...)
{
va_list va;
- TCGv_vec v0, v1, v2, t0;
+ TCGv_vec v0, v1, v2, v3, v4, t0;
va_start(va, a0);
v0 = temp_tcgv_vec(arg_temp(a0));
@@ -2984,6 +3000,12 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type,
unsigned vece,
expand_vec_cmp(type, vece, v0, v1, v2, va_arg(va, TCGArg));
break;
+ case INDEX_op_cmpsel_vec:
+ v3 = temp_tcgv_vec(arg_temp(va_arg(va, TCGArg)));
+ v4 = temp_tcgv_vec(arg_temp(va_arg(va, TCGArg)));
+ expand_vec_cmpsel(type, vece, v0, v1, v2, v3, v4, va_arg(va, TCGArg));
+ break;
+
case INDEX_op_rotrv_vec:
t0 = tcg_temp_new_vec(type);
tcg_gen_neg_vec(vece, t0, v2);
--
2.25.1
- [PULL 13/28] tcg: Expand usadd/ussub with umin/umax, (continued)
- [PULL 13/28] tcg: Expand usadd/ussub with umin/umax, Richard Henderson, 2021/10/06
- [PULL 10/28] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb, Richard Henderson, 2021/10/06
- [PULL 16/28] tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg, Richard Henderson, 2021/10/06
- [PULL 24/28] tcg/s390x: Implement vector shift operations, Richard Henderson, 2021/10/06
- [PULL 17/28] tcg/s390x: Add host vector framework, Richard Henderson, 2021/10/06
- [PULL 11/28] trace: Split guest_mem_before, Richard Henderson, 2021/10/06
- [PULL 22/28] tcg/s390x: Implement andc, orc, abs, neg, not vector operations, Richard Henderson, 2021/10/06
- [PULL 19/28] tcg/s390x: Implement tcg_out_mov for vector types, Richard Henderson, 2021/10/06
- [PULL 01/28] tests/docker: Remove fedora-i386-cross from DOCKER_PARTIAL_IMAGES, Richard Henderson, 2021/10/06
- [PULL 26/28] tcg/s390x: Implement TCG_TARGET_HAS_sat_vec, Richard Henderson, 2021/10/06
- [PULL 28/28] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec,
Richard Henderson <=
- [PULL 12/28] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass, Richard Henderson, 2021/10/06
- [PULL 09/28] accel/tcg: Pass MemOpIdx to atomic_trace_*_post, Richard Henderson, 2021/10/06
- [PULL 15/28] tcg/s390x: Change FACILITY representation, Richard Henderson, 2021/10/06
- [PULL 18/28] tcg/s390x: Implement tcg_out_ld/st for vector types, Richard Henderson, 2021/10/06
- [PULL 21/28] tcg/s390x: Implement minimal vector operations, Richard Henderson, 2021/10/06
- [PULL 25/28] tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec, Richard Henderson, 2021/10/06
- [PULL 20/28] tcg/s390x: Implement tcg_out_dup*_vec, Richard Henderson, 2021/10/06
- [PULL 23/28] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec, Richard Henderson, 2021/10/06
- [PULL 27/28] tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec, Richard Henderson, 2021/10/06
- Re: [PULL 00/28] tcg patch queue, Richard Henderson, 2021/10/06