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[PULL 23/28] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec
From: |
Richard Henderson |
Subject: |
[PULL 23/28] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec |
Date: |
Wed, 6 Oct 2021 08:20:09 -0700 |
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.h | 2 +-
tcg/s390x/tcg-target.c.inc | 7 +++++++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
index a42074e451..1c581a2f60 100644
--- a/tcg/s390x/tcg-target.h
+++ b/tcg/s390x/tcg-target.h
@@ -154,7 +154,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_shi_vec 0
#define TCG_TARGET_HAS_shs_vec 0
#define TCG_TARGET_HAS_shv_vec 0
-#define TCG_TARGET_HAS_mul_vec 0
+#define TCG_TARGET_HAS_mul_vec 1
#define TCG_TARGET_HAS_sat_vec 0
#define TCG_TARGET_HAS_minmax_vec 0
#define TCG_TARGET_HAS_bitsel_vec 0
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index cbad88271a..85178c93d3 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -277,6 +277,7 @@ typedef enum S390Opcode {
VRRc_VCEQ = 0xe7f8, /* we leave the m5 cs field 0 */
VRRc_VCH = 0xe7fb, /* " */
VRRc_VCHL = 0xe7f9, /* " */
+ VRRc_VML = 0xe7a2,
VRRc_VN = 0xe768,
VRRc_VNC = 0xe769,
VRRc_VNO = 0xe76b,
@@ -2696,6 +2697,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_andc_vec:
tcg_out_insn(s, VRRc, VNC, a0, a1, a2, 0);
break;
+ case INDEX_op_mul_vec:
+ tcg_out_insn(s, VRRc, VML, a0, a1, a2, vece);
+ break;
case INDEX_op_or_vec:
tcg_out_insn(s, VRRc, VO, a0, a1, a2, 0);
break;
@@ -2745,6 +2749,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type,
unsigned vece)
return 1;
case INDEX_op_cmp_vec:
return -1;
+ case INDEX_op_mul_vec:
+ return vece < MO_64;
default:
return 0;
}
@@ -2981,6 +2987,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_orc_vec:
case INDEX_op_xor_vec:
case INDEX_op_cmp_vec:
+ case INDEX_op_mul_vec:
return C_O1_I2(v, v, v);
default:
--
2.25.1
- [PULL 01/28] tests/docker: Remove fedora-i386-cross from DOCKER_PARTIAL_IMAGES, (continued)
- [PULL 01/28] tests/docker: Remove fedora-i386-cross from DOCKER_PARTIAL_IMAGES, Richard Henderson, 2021/10/06
- [PULL 26/28] tcg/s390x: Implement TCG_TARGET_HAS_sat_vec, Richard Henderson, 2021/10/06
- [PULL 28/28] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec, Richard Henderson, 2021/10/06
- [PULL 12/28] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass, Richard Henderson, 2021/10/06
- [PULL 09/28] accel/tcg: Pass MemOpIdx to atomic_trace_*_post, Richard Henderson, 2021/10/06
- [PULL 15/28] tcg/s390x: Change FACILITY representation, Richard Henderson, 2021/10/06
- [PULL 18/28] tcg/s390x: Implement tcg_out_ld/st for vector types, Richard Henderson, 2021/10/06
- [PULL 21/28] tcg/s390x: Implement minimal vector operations, Richard Henderson, 2021/10/06
- [PULL 25/28] tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec, Richard Henderson, 2021/10/06
- [PULL 20/28] tcg/s390x: Implement tcg_out_dup*_vec, Richard Henderson, 2021/10/06
- [PULL 23/28] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec,
Richard Henderson <=
- [PULL 27/28] tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec, Richard Henderson, 2021/10/06
- Re: [PULL 00/28] tcg patch queue, Richard Henderson, 2021/10/06