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[PULL 13/17] target/mips: Remove unused TCG temporary in gen_mipsdsp_acc
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 13/17] target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn() |
Date: |
Mon, 18 Oct 2021 00:52:41 +0200 |
Since gen_mipsdsp_accinsn() got added in commit b53371ed5d4
("target-mips: Add ASE DSP accumulator instructions"), the
'v2_t' TCG temporary has never been used. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211014224551.2204949-1-f4bug@amsat.org>
---
target/mips/tcg/translate.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 519b00121f6..47db35d7dd9 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -13616,7 +13616,6 @@ static void gen_mipsdsp_accinsn(DisasContext *ctx,
uint32_t op1, uint32_t op2,
TCGv t0;
TCGv t1;
TCGv v1_t;
- TCGv v2_t;
int16_t imm;
if ((ret == 0) && (check_ret == 1)) {
@@ -13627,10 +13626,8 @@ static void gen_mipsdsp_accinsn(DisasContext *ctx,
uint32_t op1, uint32_t op2,
t0 = tcg_temp_new();
t1 = tcg_temp_new();
v1_t = tcg_temp_new();
- v2_t = tcg_temp_new();
gen_load_gpr(v1_t, v1);
- gen_load_gpr(v2_t, v2);
switch (op1) {
case OPC_EXTR_W_DSP:
@@ -13830,7 +13827,6 @@ static void gen_mipsdsp_accinsn(DisasContext *ctx,
uint32_t op1, uint32_t op2,
tcg_temp_free(t0);
tcg_temp_free(t1);
tcg_temp_free(v1_t);
- tcg_temp_free(v2_t);
}
/* End MIPSDSP functions. */
--
2.31.1
- [PULL 03/17] hw/mips/boston: Allow loading elf kernel and dtb, (continued)
- [PULL 03/17] hw/mips/boston: Allow loading elf kernel and dtb, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 04/17] hw/mips/boston: Add FDT generator, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 05/17] target/mips: Remove unused register from MSA 2R/2RF instruction format, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 06/17] target/mips: Use tcg_constant_i32() in gen_msa_elm_df(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 07/17] target/mips: Use tcg_constant_i32() in gen_msa_2rf(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 09/17] target/mips: Use tcg_constant_i32() in gen_msa_3rf(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 10/17] target/mips: Use explicit extract32() calls in gen_msa_i5(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 08/17] target/mips: Use tcg_constant_i32() in gen_msa_2r(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 11/17] target/mips: Use tcg_constant_tl() in gen_compute_compact_branch(), Philippe Mathieu-Daudé, 2021/10/17
- [PULL 12/17] target/mips: Fix DEXTRV_S.H DSP opcode, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 13/17] target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn(),
Philippe Mathieu-Daudé <=
- [PULL 14/17] via-ide: Set user_creatable to false, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 15/17] vt82c686: Move common code to via_isa_realize, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 16/17] vt82c686: Add a method to VIA_ISA to raise ISA interrupts, Philippe Mathieu-Daudé, 2021/10/17
- [PULL 17/17] via-ide: Avoid using isa_get_irq(), Philippe Mathieu-Daudé, 2021/10/17
- Re: [PULL 00/17] MIPS patches for 2021-10-18, Richard Henderson, 2021/10/18