Re: [PATCH v5 58/67] accel/tcg: Report unaligned atomics for user-only

[Philippe Mathieu-Daudé]

On 10/15/21 06:10, Richard Henderson wrote:
> Use the new cpu_loop_exit_sigbus for atomic_mmu_lookup, which
> has access to complete alignment info from the TCGMemOpIdx arg.
> 
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  accel/tcg/user-exec.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index 5646f8e527..92cbffd7c6 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -476,11 +476,22 @@ static void *atomic_mmu_lookup(CPUArchState *env, 
> target_ulong addr,
>                                 MemOpIdx oi, int size, int prot,
>                                 uintptr_t retaddr)
>  {
> +    MemOp mop = get_memop(oi);
> +    int a_bits = get_alignment_bits(mop);
> +    void *ret;
> +
> +    /* Enforce guest required alignment.  */
> +    if (unlikely(addr & ((1 << a_bits) - 1))) {

           QEMU_IS_ALIGNED(addr, 1 << a_bits) ?

> +        MMUAccessType t = prot == PAGE_READ ? MMU_DATA_LOAD : MMU_DATA_STORE;
> +        cpu_loop_exit_sigbus(env_cpu(env), addr, t, retaddr);
> +    }

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>