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[PULL 35/45] linux-user/aarch64: Add SM bit to SVE signal context
From: |
Peter Maydell |
Subject: |
[PULL 35/45] linux-user/aarch64: Add SM bit to SVE signal context |
Date: |
Mon, 11 Jul 2022 14:57:40 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Make sure to zero the currently reserved fields.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220708151540.18136-36-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/aarch64/signal.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
index 7da0e36c6d4..3cef2f44cf5 100644
--- a/linux-user/aarch64/signal.c
+++ b/linux-user/aarch64/signal.c
@@ -78,7 +78,8 @@ struct target_extra_context {
struct target_sve_context {
struct target_aarch64_ctx head;
uint16_t vl;
- uint16_t reserved[3];
+ uint16_t flags;
+ uint16_t reserved[2];
/* The actual SVE data immediately follows. It is laid out
* according to TARGET_SVE_SIG_{Z,P}REG_OFFSET, based off of
* the original struct pointer.
@@ -101,6 +102,8 @@ struct target_sve_context {
#define TARGET_SVE_SIG_CONTEXT_SIZE(VQ) \
(TARGET_SVE_SIG_PREG_OFFSET(VQ, 17))
+#define TARGET_SVE_SIG_FLAG_SM 1
+
struct target_rt_sigframe {
struct target_siginfo info;
struct target_ucontext uc;
@@ -177,9 +180,13 @@ static void target_setup_sve_record(struct
target_sve_context *sve,
{
int i, j;
+ memset(sve, 0, sizeof(*sve));
__put_user(TARGET_SVE_MAGIC, &sve->head.magic);
__put_user(size, &sve->head.size);
__put_user(vq * TARGET_SVE_VQ_BYTES, &sve->vl);
+ if (FIELD_EX64(env->svcr, SVCR, SM)) {
+ __put_user(TARGET_SVE_SIG_FLAG_SM, &sve->flags);
+ }
/* Note that SVE regs are stored as a byte stream, with each byte element
* at a subsequent address. This corresponds to a little-endian store
--
2.25.1
- [PULL 24/45] target/arm: Implement FMOPA, FMOPS (non-widening), (continued)
- [PULL 24/45] target/arm: Implement FMOPA, FMOPS (non-widening), Peter Maydell, 2022/07/11
- [PULL 17/45] target/arm: Implement SME RDSVL, ADDSVL, ADDSPL, Peter Maydell, 2022/07/11
- [PULL 26/45] target/arm: Implement FMOPA, FMOPS (widening), Peter Maydell, 2022/07/11
- [PULL 31/45] target/arm: Reset streaming sve state on exception boundaries, Peter Maydell, 2022/07/11
- [PULL 33/45] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS, Peter Maydell, 2022/07/11
- [PULL 37/45] linux-user/aarch64: Do not allow duplicate or short sve records, Peter Maydell, 2022/07/11
- [PULL 34/45] linux-user/aarch64: Reset PSTATE.SM on syscalls, Peter Maydell, 2022/07/11
- [PULL 30/45] target/arm: Implement SCLAMP, UCLAMP, Peter Maydell, 2022/07/11
- [PULL 36/45] linux-user/aarch64: Tidy target_restore_sigframe error return, Peter Maydell, 2022/07/11
- [PULL 39/45] linux-user/aarch64: Move sve record checks into restore, Peter Maydell, 2022/07/11
- [PULL 35/45] linux-user/aarch64: Add SM bit to SVE signal context,
Peter Maydell <=
- [PULL 44/45] target/arm: Enable SME for user-only, Peter Maydell, 2022/07/11
- [PULL 28/45] target/arm: Implement PSEL, Peter Maydell, 2022/07/11
- [PULL 20/45] target/arm: Implement SME LD1, ST1, Peter Maydell, 2022/07/11
- [PULL 32/45] target/arm: Enable SME for -cpu max, Peter Maydell, 2022/07/11
- [PULL 38/45] linux-user/aarch64: Verify extra record lock succeeded, Peter Maydell, 2022/07/11
- [PULL 40/45] linux-user/aarch64: Implement SME signal handling, Peter Maydell, 2022/07/11
- [PULL 41/45] linux-user: Rename sve prctls, Peter Maydell, 2022/07/11
- [PULL 42/45] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL, Peter Maydell, 2022/07/11