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Re: [PULL 20/45] target/arm: Implement SME LD1, ST1
From: |
Peter Maydell |
Subject: |
Re: [PULL 20/45] target/arm: Implement SME LD1, ST1 |
Date: |
Fri, 15 Jul 2022 17:07:56 +0100 |
On Mon, 11 Jul 2022 at 14:58, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> From: Richard Henderson <richard.henderson@linaro.org>
>
> We cannot reuse the SVE functions for LD[1-4] and ST[1-4],
> because those functions accept only a Zreg register number.
> For SME, we want to pass a pointer into ZA storage.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Message-id: 20220708151540.18136-21-richard.henderson@linaro.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/helper-sme.h | 82 +++++
> target/arm/sme.decode | 9 +
> target/arm/sme_helper.c | 595 +++++++++++++++++++++++++++++++++++++
> target/arm/translate-sme.c | 70 +++++
> 4 files changed, 756 insertions(+)
>
> +DO_LD(q, _be, MO_128)
> +DO_LD(q, _le, MO_128)
Coverity complains that these uses of MO_128 result in an
array overrun for the pred_esz_masks[] array, because e.g.
sme_ld1() calls sve_cont_ldst_elements() calls which uses esz
as an index into pred_esz_masks[]. (Multiple coverity issues,
affects both loads and stores.)
Do we just need to add an extra entry to the array for
MO_128 (presumably 0x0001000100010001ull) ?
thanks
-- PMM
- [PULL 33/45] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS, (continued)
- [PULL 33/45] linux-user/aarch64: Clear tpidr2_el0 if CLONE_SETTLS, Peter Maydell, 2022/07/11
- [PULL 37/45] linux-user/aarch64: Do not allow duplicate or short sve records, Peter Maydell, 2022/07/11
- [PULL 34/45] linux-user/aarch64: Reset PSTATE.SM on syscalls, Peter Maydell, 2022/07/11
- [PULL 30/45] target/arm: Implement SCLAMP, UCLAMP, Peter Maydell, 2022/07/11
- [PULL 36/45] linux-user/aarch64: Tidy target_restore_sigframe error return, Peter Maydell, 2022/07/11
- [PULL 39/45] linux-user/aarch64: Move sve record checks into restore, Peter Maydell, 2022/07/11
- [PULL 35/45] linux-user/aarch64: Add SM bit to SVE signal context, Peter Maydell, 2022/07/11
- [PULL 44/45] target/arm: Enable SME for user-only, Peter Maydell, 2022/07/11
- [PULL 28/45] target/arm: Implement PSEL, Peter Maydell, 2022/07/11
- [PULL 20/45] target/arm: Implement SME LD1, ST1, Peter Maydell, 2022/07/11
- Re: [PULL 20/45] target/arm: Implement SME LD1, ST1,
Peter Maydell <=
- [PULL 32/45] target/arm: Enable SME for -cpu max, Peter Maydell, 2022/07/11
- [PULL 38/45] linux-user/aarch64: Verify extra record lock succeeded, Peter Maydell, 2022/07/11
- [PULL 40/45] linux-user/aarch64: Implement SME signal handling, Peter Maydell, 2022/07/11
- [PULL 41/45] linux-user: Rename sve prctls, Peter Maydell, 2022/07/11
- [PULL 42/45] linux-user/aarch64: Implement PR_SME_GET_VL, PR_SME_SET_VL, Peter Maydell, 2022/07/11
- [PULL 43/45] target/arm: Only set ZEN in reset if SVE present, Peter Maydell, 2022/07/11
- [PULL 45/45] linux-user/aarch64: Add SME related hwcap entries, Peter Maydell, 2022/07/11
- [PULL 08/45] target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming, Peter Maydell, 2022/07/11
- Re: [PULL 00/45] target-arm queue, Richard Henderson, 2022/07/11