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[PATCH 09/11] hw/isa/piix3: QOM'ify IDE controller creation
From: |
Bernhard Beschow |
Subject: |
[PATCH 09/11] hw/isa/piix3: QOM'ify IDE controller creation |
Date: |
Wed, 13 Jul 2022 10:17:33 +0200 |
Now that PIIX3 contains the new isa-pic, it is possible to instantiate
PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its interrupts to
the ISA bus in its realize method which requires the interrupt
controller to provide fully populated qemu_irqs. This is the case for
isa-pic even though the virtualization technology not known yet.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/i386/Kconfig | 1 -
hw/i386/pc_piix.c | 13 +++++--------
hw/isa/Kconfig | 1 +
hw/isa/piix3.c | 8 ++++++++
include/hw/southbridge/piix.h | 2 ++
5 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index d22ac4a4b9..dd247f215c 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -74,7 +74,6 @@ config I440FX
select ACPI_SMBUS
select PCI_I440FX
select PIIX3
- select IDE_PIIX
select DIMM
select SMBIOS
select FW_CFG_DMA
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 4ce215a212..f843a73d90 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -85,7 +85,6 @@ static void pc_init1(MachineState *machine,
PCIBus *pci_bus;
ISABus *isa_bus;
Object *piix4_pm;
- int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
BusState *idebus[MAX_IDE_BUS];
@@ -226,11 +225,13 @@ static void pc_init1(MachineState *machine,
for (i = 0; i < ISA_NUM_IRQS; ++i) {
qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
}
- piix3_devfn = pci_dev->devfn;
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+ idebus[0] = qdev_get_child_bus(dev, "ide.0");
+ idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
pci_bus = NULL;
piix4_pm = NULL;
@@ -244,6 +245,8 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
+ idebus[0] = NULL;
+ idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -272,12 +275,6 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
- PCIDevice *dev;
-
- dev = pci_create_simple(pci_bus, piix3_devfn + 1, "piix3-ide");
- pci_ide_create_devs(dev);
- idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index d42143a991..808b9a30af 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -34,6 +34,7 @@ config PC87312
config PIIX3
bool
select ISA_BUS
+ select IDE_PIIX
config PIIX4
bool
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 7bf3488f76..fd9c8f853a 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -328,6 +328,13 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
+ /* IDE */
+ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+ if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+ return;
+ }
+ pci_ide_create_devs(PCI_DEVICE(&d->ide));
+
/* USB */
if (d->has_usb) {
qdev_prop_set_int32(DEVICE(&d->uhci), "addr", dev->devfn + 2);
@@ -368,6 +375,7 @@ static void pci_piix3_init(Object *obj)
object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &d->ide, "piix3-ide");
object_initialize_child(obj, "uhci", &d->uhci, "piix3-usb-uhci");
object_initialize_child(obj, "pm", &d->pm, TYPE_PIIX4_PM);
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index cfe155ce07..41983dfa6d 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,6 +15,7 @@
#include "hw/pci/pci.h"
#include "qom/object.h"
#include "hw/acpi/piix4.h"
+#include "hw/ide/pci.h"
#include "hw/intc/i8259.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -56,6 +57,7 @@ struct PIIXState {
ISAPICState pic;
RTCState rtc;
+ PCIIDEState ide;
UHCIState uhci;
PIIX4PMState pm;
--
2.37.1
- [PATCH 00/11] QOM'ify PIIX3 southbridge, Bernhard Beschow, 2022/07/13
- [PATCH 01/11] hw/i386/pc: QOM'ify DMA creation, Bernhard Beschow, 2022/07/13
- [PATCH 04/11] hw/isa/piix3: QOM'ify ACPI controller creation, Bernhard Beschow, 2022/07/13
- [PATCH 06/11] hw/i386/pc: No need for rtc_state to be an out-parameter, Bernhard Beschow, 2022/07/13
- [PATCH 09/11] hw/isa/piix3: QOM'ify IDE controller creation,
Bernhard Beschow <=
- [PATCH 05/11] hw/i386/pc: QOM'ify RTC creation, Bernhard Beschow, 2022/07/13
- [PATCH 08/11] hw/isa/piix3: QOM'ify ISA PIC creation, Bernhard Beschow, 2022/07/13
- [PATCH 07/11] hw/intc/i8259: Introduce i8259 proxy "isa-pic", Bernhard Beschow, 2022/07/13
- [PATCH 11/11] hw/isa/piix3: Remove extra ';' outside of functions, Bernhard Beschow, 2022/07/13
- [PATCH 02/11] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 southbridge, Bernhard Beschow, 2022/07/13
- [PATCH 03/11] hw/isa/piix3: QOM'ify USB controller creation, Bernhard Beschow, 2022/07/13
- [PATCH 10/11] hw/isa/piix3: Wire up ACPI interrupt internally, Bernhard Beschow, 2022/07/13