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[PULL 03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL
From: |
Richard Henderson |
Subject: |
[PULL 03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
Date: |
Mon, 5 Jun 2023 13:14:59 -0700 |
All uses replaced with TCGContext.addr_type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 503126cd66..2795242b60 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1745,6 +1745,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp s_bits = opc & MO_SIZE;
@@ -1786,7 +1787,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tgen_andi_risbg(s, TCG_REG_R0, addr_reg, tlb_mask);
} else {
tcg_out_insn(s, RX, LA, TCG_REG_R0, addr_reg, TCG_REG_NONE, a_off);
- tgen_andi(s, TCG_TYPE_TL, TCG_REG_R0, tlb_mask);
+ tgen_andi(s, addr_type, TCG_REG_R0, tlb_mask);
}
if (is_ld) {
@@ -1794,7 +1795,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
} else {
ofs = offsetof(CPUTLBEntry, addr_write);
}
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_insn(s, RX, C, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs);
} else {
tcg_out_insn(s, RXY, CG, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs);
@@ -1807,7 +1808,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_insn(s, RXY, LG, h->index, TCG_TMP0, TCG_REG_NONE,
offsetof(CPUTLBEntry, addend));
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_insn(s, RRE, ALGFR, h->index, addr_reg);
h->base = TCG_REG_NONE;
} else {
@@ -1830,7 +1831,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
}
h->base = addr_reg;
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_ext32u(s, TCG_TMP0, addr_reg);
h->base = TCG_TMP0;
}
--
2.34.1
- [PULL 00/52] tcg patch queue, Richard Henderson, 2023/06/05
- [PULL 01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h, Richard Henderson, 2023/06/05
- [PULL 06/52] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/06/05
- [PULL 08/52] target/avr: Add missing includes of qemu/error-report.h, Richard Henderson, 2023/06/05
- [PULL 09/52] target/*: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/06/05
- [PULL 07/52] tcg: Add tlb_fast_offset to TCGContext, Richard Henderson, 2023/06/05
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, Richard Henderson, 2023/06/05
- [PULL 13/52] tcg: Split out tcg/oversized-guest.h, Richard Henderson, 2023/06/05
- [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 10/52] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/06/05