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[PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h
From: |
Richard Henderson |
Subject: |
[PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h |
Date: |
Mon, 5 Jun 2023 13:15:01 -0700 |
Removes the only use of TARGET_LONG_BITS from tcg.h, which is to be
target independent. Move the symbol to a define in tcg-op.h, which
will continue to be target dependent. Rather than complicate matters
for the use in tb_gen_code(), expand the definition there.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-op.h | 8 ++++++++
include/tcg/tcg.h | 7 -------
accel/tcg/translate-all.c | 2 +-
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 35c5700183..844c666374 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -722,6 +722,14 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret,
TCGv_i64 lo, TCGv_i64 hi)
#error must include QEMU headers
#endif
+#if TARGET_LONG_BITS == 32
+# define TCG_TYPE_TL TCG_TYPE_I32
+#elif TARGET_LONG_BITS == 64
+# define TCG_TYPE_TL TCG_TYPE_I64
+#else
+# error
+#endif
+
#if TARGET_INSN_START_WORDS == 1
static inline void tcg_gen_insn_start(target_ulong pc)
{
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 072c35f7f5..0da17f1b4f 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -292,13 +292,6 @@ typedef enum TCGType {
#else
TCG_TYPE_PTR = TCG_TYPE_I64,
#endif
-
- /* An alias for the size of the target "long", aka register. */
-#if TARGET_LONG_BITS == 64
- TCG_TYPE_TL = TCG_TYPE_I64,
-#else
- TCG_TYPE_TL = TCG_TYPE_I32,
-#endif
} TCGType;
/**
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index bf814b9e81..d7c93e3b57 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -350,7 +350,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tb_set_page_addr0(tb, phys_pc);
tb_set_page_addr1(tb, -1);
tcg_ctx->gen_tb = tb;
- tcg_ctx->addr_type = TCG_TYPE_TL;
+ tcg_ctx->addr_type = TARGET_LONG_BITS == 32 ? TCG_TYPE_I32 : TCG_TYPE_I64;
#ifdef CONFIG_SOFTMMU
tcg_ctx->page_bits = TARGET_PAGE_BITS;
tcg_ctx->page_mask = TARGET_PAGE_MASK;
--
2.34.1
- [PULL 00/52] tcg patch queue, Richard Henderson, 2023/06/05
- [PULL 01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h,
Richard Henderson <=
- [PULL 06/52] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/06/05
- [PULL 08/52] target/avr: Add missing includes of qemu/error-report.h, Richard Henderson, 2023/06/05
- [PULL 09/52] target/*: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/06/05
- [PULL 07/52] tcg: Add tlb_fast_offset to TCGContext, Richard Henderson, 2023/06/05
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, Richard Henderson, 2023/06/05
- [PULL 13/52] tcg: Split out tcg/oversized-guest.h, Richard Henderson, 2023/06/05
- [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 10/52] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/06/05
- [PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST, Richard Henderson, 2023/06/05
- [PULL 14/52] tcg: Move TCGv, dup_const_tl definitions to tcg-op.h, Richard Henderson, 2023/06/05