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[PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST
From: |
Richard Henderson |
Subject: |
[PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST |
Date: |
Mon, 5 Jun 2023 13:15:08 -0700 |
The symbol is always defined, even if to 0. We wanted to test for
TCG_OVERSIZED_GUEST == 0.
This fixed, the #error is reached while building arm-softmmu, because
TCG_OVERSIZED_GUEST is not true (nor supposed to be true) for arm32
guest on a 32-bit host. But that's ok, because this feature doesn't
apply to arm32. Add an #ifdef for TARGET_AARCH64.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/ptw.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 69c05cd9da..b0d2a05403 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -418,6 +418,7 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t
old_val,
uint64_t new_val, S1Translate *ptw,
ARMMMUFaultInfo *fi)
{
+#ifdef TARGET_AARCH64
uint64_t cur_val;
void *host = ptw->out_host;
@@ -473,7 +474,7 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t
old_val,
* we know that TCG_OVERSIZED_GUEST is set, which means that we are
* running in round-robin mode and could only race with dma i/o.
*/
-#ifndef TCG_OVERSIZED_GUEST
+#if !TCG_OVERSIZED_GUEST
# error "Unexpected configuration"
#endif
bool locked = qemu_mutex_iothread_locked();
@@ -497,6 +498,10 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t
old_val,
#endif
return cur_val;
+#else
+ /* AArch32 does not have FEAT_HADFS. */
+ g_assert_not_reached();
+#endif
}
static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx,
--
2.34.1
- [PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, (continued)
- [PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h, Richard Henderson, 2023/06/05
- [PULL 06/52] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/06/05
- [PULL 08/52] target/avr: Add missing includes of qemu/error-report.h, Richard Henderson, 2023/06/05
- [PULL 09/52] target/*: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/06/05
- [PULL 07/52] tcg: Add tlb_fast_offset to TCGContext, Richard Henderson, 2023/06/05
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, Richard Henderson, 2023/06/05
- [PULL 13/52] tcg: Split out tcg/oversized-guest.h, Richard Henderson, 2023/06/05
- [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 10/52] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/06/05
- [PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST,
Richard Henderson <=
- [PULL 14/52] tcg: Move TCGv, dup_const_tl definitions to tcg-op.h, Richard Henderson, 2023/06/05
- [PULL 18/52] tcg: Remove outdated comments in helper-head.h, Richard Henderson, 2023/06/05
- [PULL 17/52] target/hexagon: Include helper-gen.h where needed, Richard Henderson, 2023/06/05
- [PULL 16/52] target/arm: Include helper-gen.h in translator.h, Richard Henderson, 2023/06/05
- [PULL 19/52] tcg: Move TCGHelperInfo and dependencies to tcg/helper-info.h, Richard Henderson, 2023/06/05
- [PULL 21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line, Richard Henderson, 2023/06/05
- [PULL 25/52] target/sh4: Emit insn_start for each insn in gUSA region, Richard Henderson, 2023/06/05
- [PULL 26/52] tcg: Add insn_start_words to TCGContext, Richard Henderson, 2023/06/05
- [PULL 27/52] tcg: Add guest_mo to TCGContext, Richard Henderson, 2023/06/05
- [PULL 32/52] exec-all: Widen TranslationBlock pc and cs_base to 64-bits, Richard Henderson, 2023/06/05