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[PULL 21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line
From: |
Richard Henderson |
Subject: |
[PULL 21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line |
Date: |
Mon, 5 Jun 2023 13:15:17 -0700 |
Removes a multiplicity of calls to __assert_fail, saving up
to 360kiB of .text space as measured on an x86_64 host.
Old New Less %Change
9257272 8888680 368592 3.98% qemu-system-aarch64
6100968 5911832 189136 3.10% qemu-system-riscv64
5839112 5707032 132080 2.26% qemu-system-mips
4447608 4341752 105856 2.38% qemu-system-s390x
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 30 ++++++++++++++++--------------
tcg/tcg.c | 19 +++++++++++++++++++
2 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 34035dab81..64c10a63f3 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -630,13 +630,6 @@ static inline void *tcg_splitwx_to_rw(const void *rx)
}
#endif
-static inline size_t temp_idx(TCGTemp *ts)
-{
- ptrdiff_t n = ts - tcg_ctx->temps;
- tcg_debug_assert(n >= 0 && n < tcg_ctx->nb_temps);
- return n;
-}
-
static inline TCGArg temp_arg(TCGTemp *ts)
{
return (uintptr_t)ts;
@@ -647,16 +640,25 @@ static inline TCGTemp *arg_temp(TCGArg a)
return (TCGTemp *)(uintptr_t)a;
}
-/* Using the offset of a temporary, relative to TCGContext, rather than
- its index means that we don't use 0. That leaves offset 0 free for
- a NULL representation without having to leave index 0 unused. */
+#ifdef CONFIG_DEBUG_TCG
+size_t temp_idx(TCGTemp *ts);
+TCGTemp *tcgv_i32_temp(TCGv_i32 v);
+#else
+static inline size_t temp_idx(TCGTemp *ts)
+{
+ return ts - tcg_ctx->temps;
+}
+
+/*
+ * Using the offset of a temporary, relative to TCGContext, rather than
+ * its index means that we don't use 0. That leaves offset 0 free for
+ * a NULL representation without having to leave index 0 unused.
+ */
static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v)
{
- uintptr_t o = (uintptr_t)v;
- TCGTemp *t = (void *)tcg_ctx + o;
- tcg_debug_assert(offsetof(TCGContext, temps[temp_idx(t)]) == o);
- return t;
+ return (void *)tcg_ctx + (uintptr_t)v;
}
+#endif
static inline TCGTemp *tcgv_i64_temp(TCGv_i64 v)
{
diff --git a/tcg/tcg.c b/tcg/tcg.c
index ffd3ccaff7..59624fceec 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1800,6 +1800,25 @@ TCGv_vec tcg_constant_vec_matching(TCGv_vec match,
unsigned vece, int64_t val)
return tcg_constant_vec(t->base_type, vece, val);
}
+#ifdef CONFIG_DEBUG_TCG
+size_t temp_idx(TCGTemp *ts)
+{
+ ptrdiff_t n = ts - tcg_ctx->temps;
+ assert(n >= 0 && n < tcg_ctx->nb_temps);
+ return n;
+}
+
+TCGTemp *tcgv_i32_temp(TCGv_i32 v)
+{
+ uintptr_t o = (uintptr_t)v - offsetof(TCGContext, temps);
+
+ assert(o < sizeof(TCGTemp) * tcg_ctx->nb_temps);
+ assert(o % sizeof(TCGTemp) == 0);
+
+ return (void *)tcg_ctx + (uintptr_t)v;
+}
+#endif /* CONFIG_DEBUG_TCG */
+
/* Return true if OP may appear in the opcode stream.
Test the runtime variable that controls each opcode. */
bool tcg_op_supported(TCGOpcode op)
--
2.34.1
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, (continued)
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, Richard Henderson, 2023/06/05
- [PULL 13/52] tcg: Split out tcg/oversized-guest.h, Richard Henderson, 2023/06/05
- [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 10/52] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/06/05
- [PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST, Richard Henderson, 2023/06/05
- [PULL 14/52] tcg: Move TCGv, dup_const_tl definitions to tcg-op.h, Richard Henderson, 2023/06/05
- [PULL 18/52] tcg: Remove outdated comments in helper-head.h, Richard Henderson, 2023/06/05
- [PULL 17/52] target/hexagon: Include helper-gen.h where needed, Richard Henderson, 2023/06/05
- [PULL 16/52] target/arm: Include helper-gen.h in translator.h, Richard Henderson, 2023/06/05
- [PULL 19/52] tcg: Move TCGHelperInfo and dependencies to tcg/helper-info.h, Richard Henderson, 2023/06/05
- [PULL 21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line,
Richard Henderson <=
- [PULL 25/52] target/sh4: Emit insn_start for each insn in gUSA region, Richard Henderson, 2023/06/05
- [PULL 26/52] tcg: Add insn_start_words to TCGContext, Richard Henderson, 2023/06/05
- [PULL 27/52] tcg: Add guest_mo to TCGContext, Richard Henderson, 2023/06/05
- [PULL 32/52] exec-all: Widen TranslationBlock pc and cs_base to 64-bits, Richard Henderson, 2023/06/05
- [PULL 24/52] tcg: Split helper-proto.h, Richard Henderson, 2023/06/05
- [PULL 28/52] tcg: Move TLB_FLAGS_MASK check out of get_alignment_bits, Richard Henderson, 2023/06/05
- [PULL 29/52] tcg: Split tcg/tcg-op-gvec.h, Richard Henderson, 2023/06/05
- [PULL 35/52] accel/tcg: Move most of gen-icount.h into translator.c, Richard Henderson, 2023/06/05
- [PULL 33/52] tcg: Spit out exec/translation-block.h, Richard Henderson, 2023/06/05
- [PULL 31/52] exec-all: Widen tb_page_addr_t for user-only, Richard Henderson, 2023/06/05