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[PATCH v2 4/8] disas/riscv: Make rv_op_illegal a shared enum value
From: |
Christoph Muellner |
Subject: |
[PATCH v2 4/8] disas/riscv: Make rv_op_illegal a shared enum value |
Date: |
Mon, 12 Jun 2023 13:10:30 +0200 |
From: Christoph Müllner <christoph.muellner@vrull.eu>
The enum value 'rv_op_illegal' does not represent an
instruction, but is a catch-all value in case we have
no match in the decoder. Let's make the value a shared
one, so that other compile units can reuse it.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
disas/riscv.c | 2 +-
disas/riscv.h | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 4a55348267..b6ced2a26a 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -23,7 +23,7 @@
#include "disas/riscv.h"
typedef enum {
- rv_op_illegal = 0,
+ /* 0 is reserved for rv_op_illegal. */
rv_op_lui = 1,
rv_op_auipc = 2,
rv_op_jal = 3,
diff --git a/disas/riscv.h b/disas/riscv.h
index 9288255915..debbe69239 100644
--- a/disas/riscv.h
+++ b/disas/riscv.h
@@ -191,6 +191,10 @@ typedef struct {
const rvc_constraint *constraints;
} rv_comp_data;
+enum {
+ rv_op_illegal = 0
+};
+
enum {
rvcd_imm_nz = 0x1
};
--
2.40.1
- [PATCH v2 0/8] disas/riscv: Add vendor extension support, Christoph Muellner, 2023/06/12
- [PATCH v2 1/8] target/riscv: Use xl instead of mxl for disassemble, Christoph Muellner, 2023/06/12
- [PATCH v2 5/8] disas/riscv: Encapsulate opcode_data into decode, Christoph Muellner, 2023/06/12
- [PATCH v2 6/8] disas/riscv: Provide infrastructure for vendor extensions, Christoph Muellner, 2023/06/12
- [PATCH v2 2/8] target/riscv: Factor out extension tests to cpu_cfg.h, Christoph Muellner, 2023/06/12
- [PATCH v2 4/8] disas/riscv: Make rv_op_illegal a shared enum value,
Christoph Muellner <=
- [PATCH v2 7/8] disas/riscv: Add support for XVentanaCondOps, Christoph Muellner, 2023/06/12
- [PATCH v2 3/8] disas/riscv: Move types/constants to new header file, Christoph Muellner, 2023/06/12
- [PATCH v2 8/8] disas/riscv: Add support for XThead* instructions, Christoph Muellner, 2023/06/12
- Re: [PATCH v2 0/8] disas/riscv: Add vendor extension support, Alistair Francis, 2023/06/21