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[PATCH 3/7] target/i386: Allow MCDT_NO if host supports
From: |
Tao Su |
Subject: |
[PATCH 3/7] target/i386: Allow MCDT_NO if host supports |
Date: |
Fri, 16 Jun 2023 11:23:07 +0800 |
MCDT_NO bit indicates HW contains the security fix and doesn't need to
be mitigated to avoid data-dependent behaviour for certain instructions.
It needs no hypervisor support. Treat it as supported regardless of what
KVM reports.
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/kvm.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index de531842f6..4defd8b479 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -432,6 +432,11 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s,
uint32_t function,
uint32_t eax;
host_cpuid(7, 1, &eax, &unused, &unused, &unused);
ret |= eax & (CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS |
CPUID_7_1_EAX_FSRC);
+ } else if (function == 7 && index == 2 && reg == R_EDX) {
+ /* Not new instructions, just an optimization. */
+ uint32_t edx;
+ host_cpuid(7, 2, &unused, &unused, &unused, &edx);
+ ret |= edx & CPUID_7_2_EDX_MCDT_NO;
} else if (function == 0xd && index == 0 &&
(reg == R_EAX || reg == R_EDX)) {
/*
--
2.34.1
- [PATCH 0/7] Add new CPU model EmeraldRapids and GraniteRapids, Tao Su, 2023/06/15
- [PATCH 1/7] target/i386: Add FEAT_7_1_EDX to adjust feature level, Tao Su, 2023/06/15
- [PATCH 2/7] target/i386: Add support for MCDT_NO in CPUID enumeration, Tao Su, 2023/06/15
- [PATCH 3/7] target/i386: Allow MCDT_NO if host supports,
Tao Su <=
- [PATCH 4/7] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES, Tao Su, 2023/06/15
- [PATCH 5/7] target/i386: Add few security fix bits in ARCH_CAPABILITIES into SapphireRapids CPU model, Tao Su, 2023/06/15
- [PATCH 6/7] target/i386: Add new CPU model EmeraldRapids, Tao Su, 2023/06/15