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Re: [PATCH 1/7] target/i386: Add FEAT_7_1_EDX to adjust feature level
From: |
Tao Su |
Subject: |
Re: [PATCH 1/7] target/i386: Add FEAT_7_1_EDX to adjust feature level |
Date: |
Tue, 27 Jun 2023 12:27:19 +0800 |
On Mon, Jun 26, 2023 at 02:39:15PM +0200, Igor Mammedov wrote:
> On Fri, 16 Jun 2023 11:23:05 +0800
> Tao Su <tao1.su@linux.intel.com> wrote:
>
> > Considering the case of FEAT_7_1_EAX being 0 and FEAT_7_1_EDX being
> > non-zero,
> Can you clarify when/why that happens?
When start a VM on GraniteRapids using '-cpu host', we can see two leafs
CPUID_7_0
and CPUID_7_1 in VM, because both CPUID_7_1_EAX and CPUID_7_1_EDX have non-zero
value:
0x00000007 0x01: eax=0x00201c30 edx=0x00004000
But if we minus all FEAT_7_1_EAX features using
'-cpu host,-avx-vnni,-avx512-bf16,-fzrm,-fsrs,-fsrc,-amx-fp16', we can't get
CPUID_7_1
leaf even though CPUID_7_1_EDX has non-zero value, so it is necessary to update
cpuid_level_func7 by CPUID_7_1_EDX.
Thanks,
Tao
>
> > guest may report wrong maximum number sub-leaves in leaf
> > 07H. So add FEAT_7_1_EDX to adjust feature level.
> >
> > Fixes: eaaa197d5b11 ("target/i386: Add support for AVX-VNNI-INT8 in CPUID
> > enumeration")
> >
> > Signed-off-by: Tao Su <tao1.su@linux.intel.com>
> > Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
> > ---
> > target/i386/cpu.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 1242bd541a..e8a70c35d2 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -6778,6 +6778,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error
> > **errp)
> > x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX);
> > x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX);
> > x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX);
> > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX);
> > x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX);
> > x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX);
> > x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX);
>
>
- [PATCH 0/7] Add new CPU model EmeraldRapids and GraniteRapids, Tao Su, 2023/06/15
- [PATCH 2/7] target/i386: Add support for MCDT_NO in CPUID enumeration, Tao Su, 2023/06/15
- [PATCH 3/7] target/i386: Allow MCDT_NO if host supports, Tao Su, 2023/06/15
- [PATCH 4/7] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES, Tao Su, 2023/06/15
- [PATCH 5/7] target/i386: Add few security fix bits in ARCH_CAPABILITIES into SapphireRapids CPU model, Tao Su, 2023/06/15