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[PULL 15/20] target/tricore: ENABLE exit to main-loop
From: |
Bastian Koppelmann |
Subject: |
[PULL 15/20] target/tricore: ENABLE exit to main-loop |
Date: |
Wed, 21 Jun 2023 18:14:17 +0200 |
so we can recognize exceptions after re-enabling interrupts.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reported-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230621142302.1648383-4-kbastian@mail.uni-paderborn.de>
---
target/tricore/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index ef74e9f234..98e2767d21 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -38,6 +38,7 @@
#undef HELPER_H
#define DISAS_EXIT DISAS_TARGET_0
+#define DISAS_EXIT_UPDATE DISAS_TARGET_1
/*
* TCG registers
@@ -7900,6 +7901,7 @@ static void decode_sys_interrupts(DisasContext *ctx)
break;
case OPC2_32_SYS_ENABLE:
tcg_gen_ori_tl(cpu_ICR, cpu_ICR, ctx->icr_ie_mask);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
break;
case OPC2_32_SYS_ISYNC:
break;
@@ -8387,6 +8389,9 @@ static void tricore_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cpu)
case DISAS_TOO_MANY:
gen_goto_tb(ctx, 0, ctx->base.pc_next);
break;
+ case DISAS_EXIT_UPDATE:
+ gen_save_pc(ctx->base.pc_next);
+ /* fall through */
case DISAS_EXIT:
tcg_gen_exit_tb(NULL, 0);
break;
--
2.40.1
- [PULL 05/20] target/tricore: Add crc32.b insn, (continued)
- [PULL 05/20] target/tricore: Add crc32.b insn, Bastian Koppelmann, 2023/06/21
- [PULL 06/20] target/tricore: Add shuffle insn, Bastian Koppelmann, 2023/06/21
- [PULL 07/20] target/tricore: Implement SYCSCALL insn, Bastian Koppelmann, 2023/06/21
- [PULL 08/20] target/tricore: Add DISABLE insn variant, Bastian Koppelmann, 2023/06/21
- [PULL 09/20] target/tricore: Fix out-of-bounds index in imask instruction, Bastian Koppelmann, 2023/06/21
- [PULL 10/20] target/tricore: Correctly fix saving PSW.CDE to CSA on call, Bastian Koppelmann, 2023/06/21
- [PULL 11/20] target/tricore: Add CHECK_REG_PAIR() for insn accessing 64 bit regs, Bastian Koppelmann, 2023/06/21
- [PULL 12/20] target/tricore: Fix helper_ret() not correctly restoring PSW, Bastian Koppelmann, 2023/06/21
- [PULL 13/20] target/tricore: Fix RR_JLI clobbering reg A[11], Bastian Koppelmann, 2023/06/21
- [PULL 14/20] target/tricore: Introduce DISAS_TARGET_EXIT, Bastian Koppelmann, 2023/06/21
- [PULL 15/20] target/tricore: ENABLE exit to main-loop,
Bastian Koppelmann <=
- [PULL 16/20] target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr(), Bastian Koppelmann, 2023/06/21
- [PULL 17/20] target/tricore: Introduce priv tb flag, Bastian Koppelmann, 2023/06/21
- [PULL 18/20] target/tricore: Implement privilege level for all insns, Bastian Koppelmann, 2023/06/21
- [PULL 19/20] target/tricore: Honour privilege changes on PSW write, Bastian Koppelmann, 2023/06/21
- [PULL 20/20] target/tricore: Fix ICR.IE offset in RESTORE insn, Bastian Koppelmann, 2023/06/21
- Re: [PULL 00/20] tricore queue, Richard Henderson, 2023/06/21