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Re: [PATCH v5 39/60] target/riscv: vector floating-point classify instru
From: |
Richard Henderson |
Subject: |
Re: [PATCH v5 39/60] target/riscv: vector floating-point classify instructions |
Date: |
Sat, 14 Mar 2020 15:06:46 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 3/14/20 2:15 AM, LIU Zhiwei wrote:
>>> +static uint64_t fclass_d(uint64_t frs1, float_status *s)
>>> +{
>>> + float64 f = frs1;
>>> + bool sign = float64_is_neg(f);
>>> +
>>> + if (float64_is_infinity(f)) {
>>> + return sign ? 1 << 0 : 1 << 7;
>>> + } else if (float64_is_zero(f)) {
>>> + return sign ? 1 << 3 : 1 << 4;
>>> + } else if (float64_is_zero_or_denormal(f)) {
>>> + return sign ? 1 << 2 : 1 << 5;
>>> + } else if (float64_is_any_nan(f)) {
>>> + float_status s = { }; /* for snan_bit_is_one */
>>> + return float64_is_quiet_nan(f, &s) ? 1 << 9 : 1 << 8;
>>> + } else {
>>> + return sign ? 1 << 1 : 1 << 6;
>>> + }
>>> +}
>> These need to be moved out of fpu_helper.c so they can be shared.
> I will add an internals.h and move the declaration to internals.h.
Actually, let's just put declarations for them in internals.h and remove the
static. They are large enough that they don't need to be inlined.
r~
[PATCH v5 41/60] target/riscv: vector floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/12
[PATCH v5 42/60] target/riscv: widening floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/12
[PATCH v5 43/60] target/riscv: narrowing floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/12