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Re: urgent help on Makefile


From: Yin Lei
Subject: Re: urgent help on Makefile
Date: Tue, 8 May 2001 14:02:24 -0700 (PDT)

>   yl> On the other hand, this way still has problem. If you include
>   yl> "proj1.mk, proj2.mk, proj3.mk", the variable "SRC" will be
>   yl> overrided. So I am afraid that it will not work.
>
> Well, you never said you needed to preserve the value of SRC; what do
> you need it for?
>
> If you do need to preserve it you'll have to resort to dynamically
> constructed variable names.

Hi, Paul:

There are still something that I am not understood clearly. e.g., the
meaning of "resort to dynamically constructed variable names", although
this maybe a stupid question. :))

I tried the method you mentioned in your previous mail. Following is
my Makefile:

-----------------
proj1.mk
--
proj1_ARCH_FILES        = foo.c bar.c baz.c
proj1_ARCH_OBJS         = $(proj1_ARCH_FILES:%.c=%.o)

proj1:  $(proj1_ARCH_OBJS)

$(proj1_ARCH_OBJS):
        touch $@
-----------------
proj2.mk
--
proj2_ARCH_FILES        = foo2.c bar2.c baz2.c
proj2_ARCH_OBJS         = $(proj2_ARCH_FILES:%.c=%.o)

proj2:  $(proj2_ARCH_OBJS)

$(proj2_ARCH_OBJS):
        touch $@
----------------
Makefile
--
PROJECT_LIST    = proj1 proj2

include $(PROJECT_LIST:%=%.mk)

$(PROJECT_LIST):
        @echo "making address@hidden"
        @echo $($*_ARCH_OBJS)
----------------

The question is, this makefile can't build two targets at once. When I
type "make", it only active "proj1". The "proj2" will never be made
until I type "make proj2"

So, if there is any bug in my Makefile, or if there is a better way
for building multiple targets?

Thanks

-- 
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
Lei Yin, Ph.D
Celestry Design Technologies, Inc
1982A Zanker Road, San Jose, CA 95112
Tel: (408)501-2313(O) | Fax: (408)501-2607
=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
"I'd change the world but God won't give me the source code" -- Anonymous





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