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Re: urgent help on Makefile


From: Paul D. Smith
Subject: Re: urgent help on Makefile
Date: Tue, 8 May 2001 17:28:56 -0400

%% Yin Lei <address@hidden> writes:

  >> If you do need to preserve it you'll have to resort to dynamically
  >> constructed variable names.

  yl> There are still something that I am not understood clearly. e.g.,
  yl> the meaning of "resort to dynamically constructed variable names",
  yl> although this maybe a stupid question. :))

A dynamic, or recursive, variable name is simply a variable name which
is itself variable.

For example, say you have this:

  FOO = bar
  $(FOO) = baz

Now, you have a variable "FOO" with the value "bar", from the first
line, and you also have a variable "bar" with the value "baz", from the
second line.

You can also construct variable names from multiple parts, like this:

  FOO = bar
  $(FOO)baz = boz

Here, the second line sets the variable "barbaz" to the value "boz".

And, you can reference the value of constructed variables as well, like
this:

  blot = $($(FOO)baz)

That expands the inner part $(FOO)baz to "barbaz", then expands the
variable $(barbaz) to "boz".

Before target-specific variables came along, this method could be used
to set values based on the target and include them in the command line,
like this:

  foo.o-CFLAGS  = -Wall

  %.o : %.c
            $(CC) $(CFLAGS) $(address@hidden) -o $@ -c $<

or whatever.  Target-specific variable values are more powerful,
however, since they also let you _remove_ values:

  COPTIMIZE = -O2

  foo.o : COPTIMIZE =


In general, you can do _LOTS_ of very funky things with this feature.

  yl> PROJECT_LIST    = proj1 proj2

  yl> include $(PROJECT_LIST:%=%.mk)

  yl> $(PROJECT_LIST):
  yl>         @echo "making address@hidden"
  yl>         @echo $($*_ARCH_OBJS)

  yl> The question is, this makefile can't build two targets at
  yl> once. When I type "make", it only active "proj1". The "proj2" will
  yl> never be made until I type "make proj2"

That's easy, you just need an "all" rule as the first thing in your
top-level makefile:

  all: $(PROJECT_LIST)

  $(PROJECT_LIST):
        @echo ...

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://www.paulandlesley.org/gmake/
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist



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