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Re: [Qemu-devel] [PATCH v2 03/10] ppc: Add a bunch of hypervisor SPRs to
From: |
Thomas Huth |
Subject: |
Re: [Qemu-devel] [PATCH v2 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s |
Date: |
Wed, 16 Mar 2016 18:28:37 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 |
On 16.03.2016 14:13, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <address@hidden>
>
> We don't give them a KVM reg number to most of the registers yet as no
> current KVM version supports HV mode. For DAWR and DAWRX, the KVM reg
> number is needed since this register can be set by the guest via the
> H_SET_MODE hypercall.
>
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> [clg: squashed in patch 'ppc: Add KVM numbers to some P8 SPRs'
> changed the commit log with a proposal of Thomas Huth
> removed all hunks except those related to AMOR and DAWR* ]
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
> target-ppc/translate_init.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 6a11b41206e5..4cb3dd5076c1 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -1105,6 +1105,11 @@ static void gen_spr_amr (CPUPPCState *env)
> SPR_NOACCESS, SPR_NOACCESS,
> &spr_read_generic, &spr_write_generic,
> KVM_REG_PPC_UAMOR, 0);
> + spr_register_hv(env, SPR_AMOR, "AMOR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0);
> #endif /* !CONFIG_USER_ONLY */
> }
> #endif /* TARGET_PPC64 */
> @@ -7491,6 +7496,20 @@ static void gen_spr_book3s_dbg(CPUPPCState *env)
> KVM_REG_PPC_DABRX, 0x00000000);
> }
>
> +static void gen_spr_book3s_207_dbg(CPUPPCState *env)
> +{
> + spr_register_kvm_hv(env, SPR_DAWR, "DAWR",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + KVM_REG_PPC_DAWR, 0x00000000);
> + spr_register_kvm_hv(env, SPR_DAWRX, "DAWRX",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + KVM_REG_PPC_DAWRX, 0x00000000);
> +}
> +
> static void gen_spr_970_dbg(CPUPPCState *env)
> {
> /* Breakpoints */
> @@ -7960,6 +7979,8 @@ static void init_proc_book3s_64(CPUPPCState *env, int
> version)
> }
> if (version < BOOK3S_CPU_POWER8) {
> gen_spr_book3s_dbg(env);
> + } else {
> + gen_spr_book3s_207_dbg(env);
> }
> #if !defined(CONFIG_USER_ONLY)
> switch (version) {
Reviewed-by: Thomas Huth <address@hidden>
- [Qemu-devel] [PATCH v2 00/10] ppc: preparing pnv landing, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 02/10] ppc: Add macros to register hypervisor mode SPRs, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 01/10] ppc: Update SPR definitions, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 06/10] ppc: Initialize AMOR in PAPR mode, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 05/10] ppc: Add dummy SPR_IC for POWER8, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 04/10] ppc: Create cpu_ppc_set_papr() helper, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 07/10] ppc: Fix writing to AMR/UAMOR, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 10/10] ppc: A couple more dummy POWER8 Book4 regs, Cédric Le Goater, 2016/03/16
- [Qemu-devel] [PATCH v2 08/10] ppc: Add POWER8 IAMR register, Cédric Le Goater, 2016/03/16