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[Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160324
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160324 |
Date: |
Thu, 24 Mar 2016 15:30:42 +1100 |
The following changes since commit 2538039f2c26d66053426fb547e4f25e669baf62:
Merge remote-tracking branch 'remotes/armbru/tags/pull-ivshmem-2016-03-18'
into staging (2016-03-23 12:57:44 +0000)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.6-20160324
for you to fetch changes up to 9d0e5c8ceb70e738101bfcb31fa1c0f7375d844b:
ppc: move POWER8 Book4 regs in their own routine (2016-03-24 11:17:34 +1100)
----------------------------------------------------------------
ppc patch queue for 2016-03-24
Accumulated patches for target-ppc, pseries machine type and related
devices.
* Preliminary patches from BenH & Cédric Le Goater's powernv code
* We don't want the full machine type before 2.7
* Adding some of the SPRs also fixes migration corner cases for
spapr (when qemu has no knowledge of the registers, they're
obviously not migrated)
* We include some patches that aren't strictly fixes, but make
applying the others easier, and they're low risk
* Fix to buffer management which significantly improves throughput in
the spapr-llan virtual network device
* Start with 64-bit mode enabled on spapr. This is the way it's
supposed to be but we broke it a while back and didn't notice
because Linux guests cope anyway.
* Picked up by kvm-unit-tests
* Still some bugs here that I'm working on
----------------------------------------------------------------
Alexey Kardashevskiy (1):
spapr/target-ppc/kvm: Only add hcall-instructions if KVM supports it
Benjamin Herrenschmidt (10):
ppc: Update SPR definitions
ppc: Add macros to register hypervisor mode SPRs
ppc: Add a bunch of hypervisor SPRs to Book3s
ppc: Create cpu_ppc_set_papr() helper
ppc: Add dummy SPR_IC for POWER8
ppc: Initialize AMOR in PAPR mode
ppc: Fix writing to AMR/UAMOR
ppc: Add POWER8 IAMR register
ppc: Add dummy CIABR SPR
ppc: A couple more dummy POWER8 Book4 regs
Cédric Le Goater (1):
ppc: move POWER8 Book4 regs in their own routine
Laurent Vivier (1):
ppc64: set MSR_SF bit
Thomas Huth (3):
hw/net/spapr_llan: Extract rx buffer code into separate functions
hw/net/spapr_llan: Fix receive buffer handling for better performance
hw/net/spapr_llan: Enable the RX buffer pools by default for new machines
hw/net/spapr_llan.c | 320 +++++++++++++++++++++++++++++++++++++++-----
hw/ppc/spapr.c | 27 ++--
target-ppc/cpu.h | 61 ++++++++-
target-ppc/kvm.c | 2 +-
target-ppc/translate.c | 26 ++--
target-ppc/translate_init.c | 237 ++++++++++++++++++++++++++++----
6 files changed, 582 insertions(+), 91 deletions(-)
- [Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160324,
David Gibson <=
- [Qemu-devel] [PULL 05/16] ppc: Add a bunch of hypervisor SPRs to Book3s, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 01/16] ppc64: set MSR_SF bit, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 04/16] ppc: Add macros to register hypervisor mode SPRs, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 14/16] hw/net/spapr_llan: Fix receive buffer handling for better performance, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 08/16] ppc: Initialize AMOR in PAPR mode, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 11/16] ppc: Add dummy CIABR SPR, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 15/16] hw/net/spapr_llan: Enable the RX buffer pools by default for new machines, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 06/16] ppc: Create cpu_ppc_set_papr() helper, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 07/16] ppc: Add dummy SPR_IC for POWER8, David Gibson, 2016/03/24
- [Qemu-devel] [PULL 12/16] ppc: A couple more dummy POWER8 Book4 regs, David Gibson, 2016/03/24