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[Qemu-devel] [PULL 28/46] target/arm: Makefile cleanup (Aarch64)
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 28/46] target/arm: Makefile cleanup (Aarch64) |
Date: |
Mon, 1 Jul 2019 17:39:25 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
Group Aarch64 rules together, TCG related ones at the bottom.
This will help when restricting TCG-only objects.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/Makefile.objs | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs
index dfa736a3752..7c31fa01c1c 100644
--- a/target/arm/Makefile.objs
+++ b/target/arm/Makefile.objs
@@ -7,8 +7,7 @@ obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += neon_helper.o iwmmxt_helper.o vec_helper.o vfp_helper.o
obj-y += gdbstub.o
-obj-$(TARGET_AARCH64) += cpu64.o translate-a64.o helper-a64.o gdbstub64.o
-obj-$(TARGET_AARCH64) += pauth_helper.o
+obj-$(TARGET_AARCH64) += cpu64.o gdbstub64.o
obj-y += crypto_helper.o
obj-$(CONFIG_SOFTMMU) += arm-powerctl.o
@@ -33,4 +32,6 @@ target/arm/translate-sve.o: target/arm/decode-sve.inc.c
target/arm/translate.o: target/arm/decode-vfp.inc.c
target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c
+obj-$(TARGET_AARCH64) += translate-a64.o helper-a64.o
obj-$(TARGET_AARCH64) += translate-sve.o sve_helper.o
+obj-$(TARGET_AARCH64) += pauth_helper.o
--
2.20.1
- [Qemu-devel] [PULL 39/46] target/arm: Move TLB related routines to tlb_helper.c, (continued)
- [Qemu-devel] [PULL 39/46] target/arm: Move TLB related routines to tlb_helper.c, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 30/46] target/arm: Makefile cleanup (KVM), Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 26/46] hw/arm: Add arm SBSA reference machine, skeleton part, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 14/46] aspeed: add support for multiple NICs, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 01/46] hw/arm/boot: fix direct kernel boot with initrd, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 34/46] target/arm: Fix multiline comment syntax, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 08/46] i.mx7d: pci: Update PCI IRQ mapping to match HW, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 45/46] target/arm: Declare arm_log_exception() function publicly, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 17/46] aspeed/timer: Fix match calculations, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 22/46] aspeed: Add support for the swift-bmc board, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 28/46] target/arm: Makefile cleanup (Aarch64),
Peter Maydell <=
- [Qemu-devel] [PULL 09/46] aspeed: add a per SoC mapping for the interrupt space, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 27/46] hw/arm: Add arm SBSA reference machine, devices part, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 44/46] target/arm: Restrict PSCI to TCG, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 32/46] target/arm: Add copyright boilerplate, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 19/46] aspeed: remove the "ram" link, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 20/46] aspeed: add a RAM memory region container, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 46/46] target/arm: Declare some M-profile functions publicly, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 24/46] aspeed: vic: Add support for legacy register interface, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 02/46] hw/arm/msf2-som: Exit when the cpu is not the expected one, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 38/46] target/arm: Declare get_phys_addr() function publicly, Peter Maydell, 2019/07/01