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[Qemu-devel] [PULL 02/46] hw/arm/msf2-som: Exit when the cpu is not the
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/46] hw/arm/msf2-som: Exit when the cpu is not the expected one |
Date: |
Mon, 1 Jul 2019 17:38:59 +0100 |
From: Philippe Mathieu-Daudé <address@hidden>
This machine correctly defines its default_cpu_type to cortex-m3
and report an error if the user requested another cpu_type,
however it does not exit, and this can confuse users trying
to use another core:
$ qemu-system-arm -M emcraft-sf2 -cpu cortex-m4 -kernel test-m4.elf
qemu-system-arm: This board can only be used with CPU cortex-m3-arm-cpu
[output related to M3 core ...]
The CPU is indeed a M3 core:
(qemu) info qom-tree
/machine (emcraft-sf2-machine)
/unattached (container)
/device[0] (msf2-soc)
/armv7m (armv7m)
/cpu (cortex-m3-arm-cpu)
Add the missing exit() call to return to the shell.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/msf2-som.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 8c550a8bddc..2c9984bb3b8 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -53,6 +53,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
error_report("This board can only be used with CPU %s",
mc->default_cpu_type);
+ exit(1);
}
memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
--
2.20.1
- [Qemu-devel] [PULL 22/46] aspeed: Add support for the swift-bmc board, (continued)
- [Qemu-devel] [PULL 22/46] aspeed: Add support for the swift-bmc board, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 28/46] target/arm: Makefile cleanup (Aarch64), Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 09/46] aspeed: add a per SoC mapping for the interrupt space, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 27/46] hw/arm: Add arm SBSA reference machine, devices part, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 44/46] target/arm: Restrict PSCI to TCG, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 32/46] target/arm: Add copyright boilerplate, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 19/46] aspeed: remove the "ram" link, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 20/46] aspeed: add a RAM memory region container, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 46/46] target/arm: Declare some M-profile functions publicly, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 24/46] aspeed: vic: Add support for legacy register interface, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 02/46] hw/arm/msf2-som: Exit when the cpu is not the expected one,
Peter Maydell <=
- [Qemu-devel] [PULL 38/46] target/arm: Declare get_phys_addr() function publicly, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 37/46] target/arm: Move CPU state dumping routines to cpu.c, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 06/46] pci: designware: Update MSI mapping unconditionally, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 21/46] aspeed/smc: add a 'sdram_base' property, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 11/46] hw: timer: Add ASPEED RTC device, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 15/46] aspeed/timer: Fix behaviour running Linux, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 03/46] hw/arm/virt: Add support for Cortex-A7, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 04/46] i.mx7d: Add no-op/unimplemented APBH DMA module, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 36/46] target/arm: Move the DC ZVA helper into op_helper, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 29/46] target/arm: Makefile cleanup (ARM), Peter Maydell, 2019/07/01