Re: [Qemu-devel] [RISU PATCH v3 12/18] x86.risu: add SSE2 instructions

[Jan Bobek]

On 7/20/19 5:19 PM, Richard Henderson wrote:
> On 7/11/19 3:32 PM, Jan Bobek wrote:
>> +# F3 0F 2A /r: CVTSI2SS xmm1,r/m32
>> +CVTSI2SS SSE2 00001111 00101010 \
>> +  !constraints { rep($_); modrm($_); !(defined $_->{modrm}{reg2} && 
>> $_->{modrm}{reg2} == REG_RSP) } \
>> +  !memory { load(size => 4); }
>> +
>> +# F3 REX.W 0F 2A /r: CVTSI2SS xmm1,r/m64
>> +CVTSI2SS_64 SSE2 00001111 00101010 \
>> +  !constraints { rep($_); rex($_, w => 1); modrm($_); !(defined 
>> $_->{modrm}{reg2} && $_->{modrm}{reg2} == REG_RSP) } \
>> +  !memory { load(size => 8); }
> 
> Best I can tell, these are SSE1.  Likewise CVTTSI2SS.

Yep. I believe you mean CVTTSS2SI :) Both CVTSS2SI and CVTTSS2SI are
incorrectly flagged as SSE2, too (in addition to CVTSI2SS).

-Jan

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