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[PULL 41/54] hw/arm/mps2-tz: Make initsvtor0 setting board-specific
From: |
Peter Maydell |
Subject: |
[PULL 41/54] hw/arm/mps2-tz: Make initsvtor0 setting board-specific |
Date: |
Mon, 8 Mar 2021 17:32:31 +0000 |
The AN547 configures the SSE-300 with a different initsvtor0
setting from its default; make this a board-specific setting.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-42-peter.maydell@linaro.org
---
hw/arm/mps2-tz.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index f25a4ac0929..0a1e6c20c21 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -114,6 +114,7 @@ struct MPS2TZMachineClass {
bool fpgaio_has_dbgctrl; /* Does FPGAIO have DBGCTRL register? */
int numirq; /* Number of external interrupts */
int uart_overflow_irq; /* number of the combined UART overflow IRQ */
+ uint32_t init_svtor; /* init-svtor setting for SSE */
const RAMInfo *raminfo;
const char *armsse_type;
};
@@ -700,6 +701,7 @@ static void mps2tz_common_init(MachineState *machine)
object_property_set_link(OBJECT(&mms->iotkit), "memory",
OBJECT(system_memory), &error_abort);
qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", mmc->numirq);
+ qdev_prop_set_uint32(iotkitdev, "init-svtor", mmc->init_svtor);
qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk);
qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk);
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
@@ -1053,6 +1055,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 92;
mmc->uart_overflow_irq = 47;
+ mmc->init_svtor = 0x10000000;
mmc->raminfo = an505_raminfo;
mmc->armsse_type = TYPE_IOTKIT;
mps2tz_set_default_ram_info(mmc);
@@ -1079,6 +1082,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 92;
mmc->uart_overflow_irq = 47;
+ mmc->init_svtor = 0x10000000;
mmc->raminfo = an505_raminfo; /* AN521 is the same as AN505 here */
mmc->armsse_type = TYPE_SSE200;
mps2tz_set_default_ram_info(mmc);
@@ -1105,6 +1109,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void
*data)
mmc->fpgaio_has_dbgctrl = false;
mmc->numirq = 95;
mmc->uart_overflow_irq = 47;
+ mmc->init_svtor = 0x10000000;
mmc->raminfo = an524_raminfo;
mmc->armsse_type = TYPE_SSE200;
mps2tz_set_default_ram_info(mmc);
--
2.20.1
- [PULL 39/54] hw/misc/mps2-scc: Implement changes for AN547, (continued)
- [PULL 39/54] hw/misc/mps2-scc: Implement changes for AN547, Peter Maydell, 2021/03/08
- [PULL 24/54] hw/arm/armsse: Move dual-timer device into data-driven framework, Peter Maydell, 2021/03/08
- [PULL 33/54] hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo, Peter Maydell, 2021/03/08
- [PULL 34/54] hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block, Peter Maydell, 2021/03/08
- [PULL 44/54] tests/qtest/sse-timer-test: Add simple test of the SSE counter, Peter Maydell, 2021/03/08
- [PULL 36/54] hw/arm/mps2-tz: Make UART overflow IRQ board-specific, Peter Maydell, 2021/03/08
- [PULL 35/54] hw/arm/armsse: Add SSE-300 support, Peter Maydell, 2021/03/08
- [PULL 40/54] hw/arm/mps2-tz: Support running APB peripherals on different clock, Peter Maydell, 2021/03/08
- [PULL 42/54] hw/arm/mps2-tz: Add new mps3-an547 board, Peter Maydell, 2021/03/08
- [PULL 43/54] docs/system/arm/mps2.rst: Document the new mps3-an547 board, Peter Maydell, 2021/03/08
- [PULL 41/54] hw/arm/mps2-tz: Make initsvtor0 setting board-specific,
Peter Maydell <=
- [PULL 37/54] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate, Peter Maydell, 2021/03/08
- [PULL 45/54] tests/qtest/sse-timer-test: Test the system timer, Peter Maydell, 2021/03/08
- [PULL 50/54] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI, Peter Maydell, 2021/03/08
- [PULL 47/54] target/arm: Restrict v7A TCG cpus to TCG accel, Peter Maydell, 2021/03/08
- [PULL 46/54] tests/qtest/sse-timer-test: Test counter scaling changes, Peter Maydell, 2021/03/08
- [PULL 53/54] hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_, Peter Maydell, 2021/03/08
- [PULL 52/54] hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips, Peter Maydell, 2021/03/08
- [PULL 49/54] hw/arm: xlnx-zynqmp: Clean up coding convention issues, Peter Maydell, 2021/03/08
- [PULL 54/54] hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt(), Peter Maydell, 2021/03/08
- [PULL 48/54] hw/dma: Implement a Xilinx CSU DMA model, Peter Maydell, 2021/03/08