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[PULL 20/26] hw/char: sifive_uart: Register device in 'input' category
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From: |
Alistair Francis |
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Subject: |
[PULL 20/26] hw/char: sifive_uart: Register device in 'input' category |
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Date: |
Thu, 7 Oct 2021 16:47:45 +1000 |
From: Bin Meng <bmeng.cn@gmail.com>
The category of sifive_uart device is not set. Put it into the
'input' category.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210926105003.2716-3-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/char/sifive_uart.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
index 278e21c434..1c75f792b3 100644
--- a/hw/char/sifive_uart.c
+++ b/hw/char/sifive_uart.c
@@ -248,6 +248,7 @@ static void sifive_uart_class_init(ObjectClass *oc, void
*data)
rc->phases.enter = sifive_uart_reset_enter;
rc->phases.hold = sifive_uart_reset_hold;
device_class_set_props(dc, sifive_uart_properties);
+ set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}
static const TypeInfo sifive_uart_info = {
--
2.31.1
- [PATCH v1A] target/riscv: fix orc.b instruction in the Zbb extension, (continued)
- [PULL 12/26] target/riscv: Add a REQUIRE_32BIT macro, Alistair Francis, 2021/10/07
- [PULL 13/26] target/riscv: Add rev8 instruction, removing grev/grevi, Alistair Francis, 2021/10/07
- [PULL 14/26] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Alistair Francis, 2021/10/07
- [PULL 15/26] target/riscv: Remove RVB (replaced by Zb[abcs]), Alistair Francis, 2021/10/07
- [PULL 16/26] disas/riscv: Add Zb[abcs] instructions, Alistair Francis, 2021/10/07
- [PULL 17/26] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty(), Alistair Francis, 2021/10/07
- [PULL 18/26] hw/char: ibex_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 19/26] hw/char: shakti_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 20/26] hw/char: sifive_uart: Register device in 'input' category,
Alistair Francis <=
- [PULL 21/26] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition, Alistair Francis, 2021/10/07
- [PULL 24/26] hw/dma: sifive_pdma: Fix Control.claim bit detection, Alistair Francis, 2021/10/07
- [PULL 25/26] hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed, Alistair Francis, 2021/10/07
- [PULL 22/26] hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container, Alistair Francis, 2021/10/07
- [PULL 23/26] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART, Alistair Francis, 2021/10/07
- [PULL 26/26] hw/riscv: shakti_c: Mark as not user creatable, Alistair Francis, 2021/10/07
- Re: [PULL 00/26] riscv-to-apply queue, Richard Henderson, 2021/10/07