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[PULL 21/26] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG d
From: |
Alistair Francis |
Subject: |
[PULL 21/26] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition |
Date: |
Thu, 7 Oct 2021 16:47:46 +1000 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The current MCHP_PFSOC_MMUART_REG_SIZE definition represent the
size occupied by all the registers. However all registers are
32-bit wide, and the MemoryRegionOps handlers are restricted to
32-bit:
static const MemoryRegionOps mchp_pfsoc_mmuart_ops = {
.read = mchp_pfsoc_mmuart_read,
.write = mchp_pfsoc_mmuart_write,
.impl = {
.min_access_size = 4,
.max_access_size = 4,
},
Avoid being triskaidekaphobic, simplify by using the number of
registers.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210925133407.1259392-2-f4bug@amsat.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/char/mchp_pfsoc_mmuart.h | 4 ++--
hw/char/mchp_pfsoc_mmuart.c | 14 ++++++++------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/include/hw/char/mchp_pfsoc_mmuart.h
b/include/hw/char/mchp_pfsoc_mmuart.h
index f61990215f..9c012e6c97 100644
--- a/include/hw/char/mchp_pfsoc_mmuart.h
+++ b/include/hw/char/mchp_pfsoc_mmuart.h
@@ -30,7 +30,7 @@
#include "hw/char/serial.h"
-#define MCHP_PFSOC_MMUART_REG_SIZE 52
+#define MCHP_PFSOC_MMUART_REG_COUNT 13
typedef struct MchpPfSoCMMUartState {
MemoryRegion iomem;
@@ -39,7 +39,7 @@ typedef struct MchpPfSoCMMUartState {
SerialMM *serial;
- uint32_t reg[MCHP_PFSOC_MMUART_REG_SIZE / sizeof(uint32_t)];
+ uint32_t reg[MCHP_PFSOC_MMUART_REG_COUNT];
} MchpPfSoCMMUartState;
/**
diff --git a/hw/char/mchp_pfsoc_mmuart.c b/hw/char/mchp_pfsoc_mmuart.c
index 2facf85c2d..584e7fec17 100644
--- a/hw/char/mchp_pfsoc_mmuart.c
+++ b/hw/char/mchp_pfsoc_mmuart.c
@@ -29,13 +29,14 @@ static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr
addr, unsigned size)
{
MchpPfSoCMMUartState *s = opaque;
- if (addr >= MCHP_PFSOC_MMUART_REG_SIZE) {
+ addr >>= 2;
+ if (addr >= MCHP_PFSOC_MMUART_REG_COUNT) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: read: addr=0x%" HWADDR_PRIx "\n",
- __func__, addr);
+ __func__, addr << 2);
return 0;
}
- return s->reg[addr / sizeof(uint32_t)];
+ return s->reg[addr];
}
static void mchp_pfsoc_mmuart_write(void *opaque, hwaddr addr,
@@ -44,13 +45,14 @@ static void mchp_pfsoc_mmuart_write(void *opaque, hwaddr
addr,
MchpPfSoCMMUartState *s = opaque;
uint32_t val32 = (uint32_t)value;
- if (addr >= MCHP_PFSOC_MMUART_REG_SIZE) {
+ addr >>= 2;
+ if (addr >= MCHP_PFSOC_MMUART_REG_COUNT) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%" HWADDR_PRIx
- " v=0x%x\n", __func__, addr, val32);
+ " v=0x%x\n", __func__, addr << 2, val32);
return;
}
- s->reg[addr / sizeof(uint32_t)] = val32;
+ s->reg[addr] = val32;
}
static const MemoryRegionOps mchp_pfsoc_mmuart_ops = {
--
2.31.1
- [PATCH v1B] target/riscv: fix orc.b instruction in the Zbb extension, (continued)
- [PULL 12/26] target/riscv: Add a REQUIRE_32BIT macro, Alistair Francis, 2021/10/07
- [PULL 13/26] target/riscv: Add rev8 instruction, removing grev/grevi, Alistair Francis, 2021/10/07
- [PULL 14/26] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Alistair Francis, 2021/10/07
- [PULL 15/26] target/riscv: Remove RVB (replaced by Zb[abcs]), Alistair Francis, 2021/10/07
- [PULL 16/26] disas/riscv: Add Zb[abcs] instructions, Alistair Francis, 2021/10/07
- [PULL 17/26] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty(), Alistair Francis, 2021/10/07
- [PULL 18/26] hw/char: ibex_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 19/26] hw/char: shakti_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 20/26] hw/char: sifive_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 21/26] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition,
Alistair Francis <=
- [PULL 24/26] hw/dma: sifive_pdma: Fix Control.claim bit detection, Alistair Francis, 2021/10/07
- [PULL 25/26] hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed, Alistair Francis, 2021/10/07
- [PULL 22/26] hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container, Alistair Francis, 2021/10/07
- [PULL 23/26] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART, Alistair Francis, 2021/10/07
- [PULL 26/26] hw/riscv: shakti_c: Mark as not user creatable, Alistair Francis, 2021/10/07
- Re: [PULL 00/26] riscv-to-apply queue, Richard Henderson, 2021/10/07