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[PULL 24/26] hw/dma: sifive_pdma: Fix Control.claim bit detection
From: |
Alistair Francis |
Subject: |
[PULL 24/26] hw/dma: sifive_pdma: Fix Control.claim bit detection |
Date: |
Thu, 7 Oct 2021 16:47:49 +1000 |
From: Bin Meng <bmeng.cn@gmail.com>
At present the codes detect whether the DMA channel is claimed by:
claimed = !!s->chan[ch].control & CONTROL_CLAIM;
As ! has higher precedence over & (bitwise and), this is essentially
claimed = (!!s->chan[ch].control) & CONTROL_CLAIM;
which is wrong, as any non-zero bit set in the control register will
produce a result of a claimed channel.
Fixes: de7c7988d25d ("hw/dma: sifive_pdma: reset Next* registers when
Control.claim is set")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210927072124.1564129-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/dma/sifive_pdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c
index b4fd40573a..b8ec7621f3 100644
--- a/hw/dma/sifive_pdma.c
+++ b/hw/dma/sifive_pdma.c
@@ -243,7 +243,7 @@ static void sifive_pdma_write(void *opaque, hwaddr offset,
offset &= 0xfff;
switch (offset) {
case DMA_CONTROL:
- claimed = !!s->chan[ch].control & CONTROL_CLAIM;
+ claimed = !!(s->chan[ch].control & CONTROL_CLAIM);
if (!claimed && (value & CONTROL_CLAIM)) {
/* reset Next* registers */
--
2.31.1
- [PULL 12/26] target/riscv: Add a REQUIRE_32BIT macro, (continued)
- [PULL 12/26] target/riscv: Add a REQUIRE_32BIT macro, Alistair Francis, 2021/10/07
- [PULL 13/26] target/riscv: Add rev8 instruction, removing grev/grevi, Alistair Francis, 2021/10/07
- [PULL 14/26] target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh, Alistair Francis, 2021/10/07
- [PULL 15/26] target/riscv: Remove RVB (replaced by Zb[abcs]), Alistair Francis, 2021/10/07
- [PULL 16/26] disas/riscv: Add Zb[abcs] instructions, Alistair Francis, 2021/10/07
- [PULL 17/26] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty(), Alistair Francis, 2021/10/07
- [PULL 18/26] hw/char: ibex_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 19/26] hw/char: shakti_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 20/26] hw/char: sifive_uart: Register device in 'input' category, Alistair Francis, 2021/10/07
- [PULL 21/26] hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definition, Alistair Francis, 2021/10/07
- [PULL 24/26] hw/dma: sifive_pdma: Fix Control.claim bit detection,
Alistair Francis <=
- [PULL 25/26] hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed, Alistair Francis, 2021/10/07
- [PULL 22/26] hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion container, Alistair Francis, 2021/10/07
- [PULL 23/26] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART, Alistair Francis, 2021/10/07
- [PULL 26/26] hw/riscv: shakti_c: Mark as not user creatable, Alistair Francis, 2021/10/07
- Re: [PULL 00/26] riscv-to-apply queue, Richard Henderson, 2021/10/07