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[PATCH 05/33] target/mips: Have check_msa_access() return a boolean
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 05/33] target/mips: Have check_msa_access() return a boolean |
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Date: |
Sat, 23 Oct 2021 23:47:35 +0200 |
Have check_msa_access() return a boolean value so we can
return early if MSA is not enabled.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/msa_translate.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index 3ef912da6b8..9e0a08fe335 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -293,19 +293,19 @@ void msa_translate_init(void)
}
}
-static inline int check_msa_access(DisasContext *ctx)
+static inline bool check_msa_access(DisasContext *ctx)
{
if (unlikely((ctx->hflags & MIPS_HFLAG_FPU) &&
!(ctx->hflags & MIPS_HFLAG_F64))) {
gen_reserved_instruction(ctx);
- return 0;
+ return false;
}
if (unlikely(!(ctx->hflags & MIPS_HFLAG_MSA))) {
generate_exception_end(ctx, EXCP_MSADIS);
- return 0;
+ return false;
}
- return 1;
+ return true;
}
static void gen_check_zero_element(TCGv tresult, uint8_t df, uint8_t wt,
@@ -354,7 +354,9 @@ static bool gen_msa_BxZ_V(DisasContext *ctx, int wt, int
s16, TCGCond cond)
{
TCGv_i64 t0;
- check_msa_access(ctx);
+ if (!check_msa_access(ctx)) {
+ return false;
+ }
if (ctx->hflags & MIPS_HFLAG_BMASK) {
gen_reserved_instruction(ctx);
@@ -386,7 +388,9 @@ static bool trans_BNZ_V(DisasContext *ctx, arg_msa_bz *a)
static bool gen_msa_BxZ(DisasContext *ctx, int df, int wt, int s16, bool
if_not)
{
- check_msa_access(ctx);
+ if (!check_msa_access(ctx)) {
+ return false;
+ }
if (ctx->hflags & MIPS_HFLAG_BMASK) {
gen_reserved_instruction(ctx);
@@ -2158,7 +2162,9 @@ static bool trans_MSA(DisasContext *ctx, arg_MSA *a)
{
uint32_t opcode = ctx->opcode;
- check_msa_access(ctx);
+ if (!check_msa_access(ctx)) {
+ return false;
+ }
switch (MASK_MSA_MINOR(opcode)) {
case OPC_MSA_I8_00:
--
2.31.1
- [PATCH 00/33] target/mips: Fully convert MSA opcodes to decodetree, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 01/33] tests/tcg: Fix some targets default cross compiler path, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 02/33] target/mips: Fix MSA MADDV.B opcode, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 03/33] target/mips: Fix MSA MSUBV.B opcode, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 04/33] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 05/33] target/mips: Have check_msa_access() return a boolean,
Philippe Mathieu-Daudé <=
- [PATCH 06/33] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 07/33] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 08/33] target/mips: Convert MSA LDI opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 09/33] target/mips: Introduce generic TRANS_CHECK() for decodetree helpers, Philippe Mathieu-Daudé, 2021/10/23