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[PATCH 06/33] target/mips: Use enum definitions from CPUMIPSMSADataForma
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 06/33] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum |
Date: |
Sat, 23 Oct 2021 23:47:36 +0200 |
Replace magic DataFormat value by the corresponding
enum from CPUMIPSMSADataFormat.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/msa_translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index 9e0a08fe335..1c4a802ff55 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -1801,10 +1801,10 @@ static void gen_msa_3rf(DisasContext *ctx)
case OPC_MULR_Q_df:
case OPC_MADDR_Q_df:
case OPC_MSUBR_Q_df:
- tdf = tcg_constant_i32(df + 1);
+ tdf = tcg_constant_i32(DF_HALF + df);
break;
default:
- tdf = tcg_constant_i32(df + 2);
+ tdf = tcg_constant_i32(DF_WORD + df);
break;
}
@@ -2033,7 +2033,7 @@ static void gen_msa_2rf(DisasContext *ctx)
TCGv_i32 twd = tcg_const_i32(wd);
TCGv_i32 tws = tcg_const_i32(ws);
/* adjust df value for floating-point instruction */
- TCGv_i32 tdf = tcg_constant_i32(df + 2);
+ TCGv_i32 tdf = tcg_constant_i32(DF_WORD + df);
switch (MASK_MSA_2RF(ctx->opcode)) {
case OPC_FCLASS_df:
--
2.31.1
- [PATCH 00/33] target/mips: Fully convert MSA opcodes to decodetree, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 01/33] tests/tcg: Fix some targets default cross compiler path, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 02/33] target/mips: Fix MSA MADDV.B opcode, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 03/33] target/mips: Fix MSA MSUBV.B opcode, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 04/33] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 05/33] target/mips: Have check_msa_access() return a boolean, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 06/33] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum,
Philippe Mathieu-Daudé <=
- [PATCH 07/33] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 08/33] target/mips: Convert MSA LDI opcode to decodetree, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 09/33] target/mips: Introduce generic TRANS_CHECK() for decodetree helpers, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 10/33] target/mips: Extract df_extract() helper, Philippe Mathieu-Daudé, 2021/10/23
- [PATCH 11/33] target/mips: Convert MSA I5 instruction format to decodetree, Philippe Mathieu-Daudé, 2021/10/23